From 4a8b7d030bf815baf082bc066c84ba091bc4e31f Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 22 Jul 2009 06:37:28 +0000 Subject: [PATCH] Add R12 to the list of registers clobbered by 16-bit Thumb calls as a pre-caution. r12 could be live once we have mixed 32-bit and 16-bit instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76728 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrThumb.td | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index 861b468c2d2..9e4b3216d3d 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -166,8 +166,8 @@ def tPOP_RET : T1I<(outs reglist:$dst1, variable_ops), (ins), "pop $dst1", []>; let isCall = 1, - Defs = [R0, R1, R2, R3, LR, - D0, D1, D2, D3, D4, D5, D6, D7] in { + Defs = [R0, R1, R2, R3, R12, LR, + D0, D1, D2, D3, D4, D5, D6, D7, CPSR] in { def tBL : T1Ix2<(outs), (ins i32imm:$func, variable_ops), "bl ${func:call}", [(ARMtcall tglobaladdr:$func)]>;