RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2026-07-19 23:23:38 -04:00
Code Issues Packages Projects Releases 10 Wiki Activity

[NFC] Replace 'isDarwin' with 'IsDarwin'

Browse Source 
Summary: Replace 'isDarwin' with 'IsDarwin' based on LLVM naming convention.

Differential Revision: https://reviews.llvm.org/D68336

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373852 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Xiangling Liao
2019-10-06 14:44:22 +00:00
parent 9317048f2d
commit 4ae92ff4a1
7 changed files with 38 additions and 38 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp
+2 -2
View File
@@ -19,8 +19,8 @@ using namespace llvm;
const PPCMCExpr*
PPCMCExpr::create(VariantKind Kind, const MCExpr *Expr,
bool isDarwin, MCContext &Ctx) {
return new (Ctx) PPCMCExpr(Kind, Expr, isDarwin);
bool IsDarwin, MCContext &Ctx) {
return new (Ctx) PPCMCExpr(Kind, Expr, IsDarwin);
}
void PPCMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.h
+7 -7
View File
@@ -45,21 +45,21 @@ public:
/// @{
static const PPCMCExpr *create(VariantKind Kind, const MCExpr *Expr,
bool isDarwin, MCContext &Ctx);
bool IsDarwin, MCContext &Ctx);
static const PPCMCExpr *createLo(const MCExpr *Expr,
bool isDarwin, MCContext &Ctx) {
return create(VK_PPC_LO, Expr, isDarwin, Ctx);
bool IsDarwin, MCContext &Ctx) {
return create(VK_PPC_LO, Expr, IsDarwin, Ctx);
}
static const PPCMCExpr *createHi(const MCExpr *Expr,
bool isDarwin, MCContext &Ctx) {
return create(VK_PPC_HI, Expr, isDarwin, Ctx);
bool IsDarwin, MCContext &Ctx) {
return create(VK_PPC_HI, Expr, IsDarwin, Ctx);
}
static const PPCMCExpr *createHa(const MCExpr *Expr,
bool isDarwin, MCContext &Ctx) {
return create(VK_PPC_HA, Expr, isDarwin, Ctx);
bool IsDarwin, MCContext &Ctx) {
return create(VK_PPC_HA, Expr, IsDarwin, Ctx);
}
/// @}
lib/Target/PowerPC/PPC.h
+2 -2
View File
@@ -50,10 +50,10 @@ namespace llvm {
FunctionPass *createPPCExpandISELPass();
FunctionPass *createPPCPreEmitPeepholePass();
void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
AsmPrinter &AP, bool isDarwin);
AsmPrinter &AP, bool IsDarwin);
bool LowerPPCMachineOperandToMCOperand(const MachineOperand &MO,
MCOperand &OutMO, AsmPrinter &AP,
bool isDarwin);
bool IsDarwin);
void initializePPCCTRLoopsPass(PassRegistry&);
#ifndef NDEBUG
lib/Target/PowerPC/PPCAsmPrinter.cpp
+10 -10
View File
@@ -517,7 +517,7 @@ void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
///
void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
MCInst TmpInst;
bool isDarwin = TM.getTargetTriple().isOSDarwin();
const bool IsDarwin = TM.getTargetTriple().isOSDarwin();
const Module *M = MF->getFunction().getParent();
PICLevel::Level PL = M->getPICLevel();
@@ -604,7 +604,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
// addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha
// addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l
// Get the offset from the GOT Base Register to the GOT
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
if (Subtarget->isSecurePlt() && isPositionIndependent() ) {
unsigned PICR = TmpInst.getOperand(0).getReg();
MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol(
@@ -655,10 +655,10 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
}
case PPC::LWZtoc: {
assert(!isDarwin && "TOC is an ELF/XCOFF construct.");
assert(!IsDarwin && "TOC is an ELF/XCOFF construct.");
// Transform %rN = LWZtoc @op1, %r2
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
// Change the opcode to LWZ.
TmpInst.setOpcode(PPC::LWZ);
@@ -724,7 +724,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
case PPC::LDtocBA:
case PPC::LDtoc: {
// Transform %x3 = LDtoc @min1, %x2
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
// Change the opcode to LD, and the global address operand to be a
// reference to the TOC entry we will synthesize later.
@@ -755,7 +755,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
case PPC::ADDIStocHA8: {
// Transform %xd = ADDIStocHA8 %x2, @sym
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
// Change the opcode to ADDIS8. If the global address is external, has
// common linkage, is a non-local function address, or is a jump table
@@ -801,7 +801,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
case PPC::LDtocL: {
// Transform %xd = LDtocL @sym, %xs
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
// Change the opcode to LD. If the global address is external, has
// common linkage, or is a jump table address, then reference the
@@ -843,7 +843,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
case PPC::ADDItocL: {
// Transform %xd = ADDItocL %xs, @sym
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
// Change the opcode to ADDI8. If the global address is external, then
// generate a TOC entry and reference that. Otherwise reference the
@@ -888,7 +888,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
case PPC::LDgotTprelL:
case PPC::LDgotTprelL32: {
// Transform %xd = LDgotTprelL @sym, %xs
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
// Change the opcode to LD.
TmpInst.setOpcode(Subtarget->isPPC64() ? PPC::LD : PPC::LWZ);
@@ -1130,7 +1130,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
}
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
EmitToStreamer(*OutStreamer, TmpInst);
}
lib/Target/PowerPC/PPCFrameLowering.cpp
+3 -3
View File
@@ -1776,8 +1776,8 @@ void PPCFrameLowering::determineCalleeSaves(MachineFunction &MF,
// Save R31 if necessary
int FPSI = FI->getFramePointerSaveIndex();
bool isPPC64 = Subtarget.isPPC64();
bool isDarwinABI = Subtarget.isDarwinABI();
const bool isPPC64 = Subtarget.isPPC64();
const bool IsDarwinABI = Subtarget.isDarwinABI();
MachineFrameInfo &MFI = MF.getFrameInfo();
// If the frame pointer save index hasn't been defined yet.
@@ -1826,7 +1826,7 @@ void PPCFrameLowering::determineCalleeSaves(MachineFunction &MF,
// For 32-bit SVR4, allocate the nonvolatile CR spill slot iff the
// function uses CR 2, 3, or 4.
if (!isPPC64 && !isDarwinABI &&
if (!isPPC64 && !IsDarwinABI &&
(SavedRegs.test(PPC::CR2) ||
SavedRegs.test(PPC::CR3) ||
SavedRegs.test(PPC::CR4))) {
lib/Target/PowerPC/PPCISelLowering.cpp
+3 -3
View File
@@ -14516,7 +14516,7 @@ SDValue PPCTargetLowering::LowerFRAMEADDR(SDValue Op,
Register PPCTargetLowering::getRegisterByName(const char* RegName, EVT VT,
const MachineFunction &MF) const {
bool isPPC64 = Subtarget.isPPC64();
bool isDarwinABI = Subtarget.isDarwinABI();
bool IsDarwinABI = Subtarget.isDarwinABI();
if ((isPPC64 && VT != MVT::i64 && VT != MVT::i32) ||
(!isPPC64 && VT != MVT::i32))
@@ -14525,8 +14525,8 @@ Register PPCTargetLowering::getRegisterByName(const char* RegName, EVT VT,
bool is64Bit = isPPC64 && VT == MVT::i64;
Register Reg = StringSwitch<Register>(RegName)
.Case("r1", is64Bit ? PPC::X1 : PPC::R1)
.Case("r2", (isDarwinABI || isPPC64) ? Register() : PPC::R2)
.Case("r13", (!isPPC64 && isDarwinABI) ? Register() :
.Case("r2", (IsDarwinABI || isPPC64) ? Register() : PPC::R2)
.Case("r13", (!isPPC64 && IsDarwinABI) ? Register() :
(is64Bit ? PPC::X13 : PPC::R13))
.Default(Register());
lib/Target/PowerPC/PPCMCInstLower.cpp
+11 -11
View File
@@ -79,7 +79,7 @@ static MCSymbol *GetSymbolFromOperand(const MachineOperand &MO,
}
static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol,
AsmPrinter &Printer, bool isDarwin) {
AsmPrinter &Printer, bool IsDarwin) {
MCContext &Ctx = Printer.OutContext;
MCSymbolRefExpr::VariantKind RefKind = MCSymbolRefExpr::VK_None;
@@ -137,10 +137,10 @@ static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol,
// Add ha16() / lo16() markers if required.
switch (access) {
case PPCII::MO_LO:
Expr = PPCMCExpr::createLo(Expr, isDarwin, Ctx);
Expr = PPCMCExpr::createLo(Expr, IsDarwin, Ctx);
break;
case PPCII::MO_HA:
Expr = PPCMCExpr::createHa(Expr, isDarwin, Ctx);
Expr = PPCMCExpr::createHa(Expr, IsDarwin, Ctx);
break;
}
@@ -148,20 +148,20 @@ static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol,
}
void llvm::LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
AsmPrinter &AP, bool isDarwin) {
AsmPrinter &AP, bool IsDarwin) {
OutMI.setOpcode(MI->getOpcode());
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MCOperand MCOp;
if (LowerPPCMachineOperandToMCOperand(MI->getOperand(i), MCOp, AP,
isDarwin))
IsDarwin))
OutMI.addOperand(MCOp);
}
}
bool llvm::LowerPPCMachineOperandToMCOperand(const MachineOperand &MO,
MCOperand &OutMO, AsmPrinter &AP,
bool isDarwin) {
bool IsDarwin) {
switch (MO.getType()) {
default:
llvm_unreachable("unknown operand type");
@@ -181,20 +181,20 @@ bool llvm::LowerPPCMachineOperandToMCOperand(const MachineOperand &MO,
return true;
case MachineOperand::MO_GlobalAddress:
case MachineOperand::MO_ExternalSymbol:
OutMO = GetSymbolRef(MO, GetSymbolFromOperand(MO, AP), AP, isDarwin);
OutMO = GetSymbolRef(MO, GetSymbolFromOperand(MO, AP), AP, IsDarwin);
return true;
case MachineOperand::MO_JumpTableIndex:
OutMO = GetSymbolRef(MO, AP.GetJTISymbol(MO.getIndex()), AP, isDarwin);
OutMO = GetSymbolRef(MO, AP.GetJTISymbol(MO.getIndex()), AP, IsDarwin);
return true;
case MachineOperand::MO_ConstantPoolIndex:
OutMO = GetSymbolRef(MO, AP.GetCPISymbol(MO.getIndex()), AP, isDarwin);
OutMO = GetSymbolRef(MO, AP.GetCPISymbol(MO.getIndex()), AP, IsDarwin);
return true;
case MachineOperand::MO_BlockAddress:
OutMO = GetSymbolRef(MO, AP.GetBlockAddressSymbol(MO.getBlockAddress()), AP,
isDarwin);
IsDarwin);
return true;
case MachineOperand::MO_MCSymbol:
OutMO = GetSymbolRef(MO, MO.getMCSymbol(), AP, isDarwin);
OutMO = GetSymbolRef(MO, MO.getMCSymbol(), AP, IsDarwin);
return true;
case MachineOperand::MO_RegisterMask:
return false;