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Reenable a basic SSA DAG builder optimization.

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Jakob fixed ProcessImplicifDefs in r159149.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160910 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2012-07-28 01:48:15 +00:00
parent 08f6ef6a78
commit 4b72ada1f4
1 changed files with 4 additions and 5 deletions
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9
lib/CodeGen/ScheduleDAGInstrs.cpp
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@ -411,12 +411,11 @@ void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) {
const MachineInstr *MI = SU->getInstr();
unsigned Reg = MI->getOperand(OperIdx).getReg();
// SSA defs do not have output/anti dependencies.
// Singly defined vregs do not have output/anti dependencies.
// The current operand is a def, so we have at least one.
//
// FIXME: This optimization is disabled pending PR13112.
//if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
// return;
// Check here if there are any others...
if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
return;
// Add output dependence to the next nearest def of this vreg.
//