From 4cc3d1b910a60337f3dc9bc640ea18e2ed7090d4 Mon Sep 17 00:00:00 2001 From: Akira Hatanaka Date: Thu, 25 Apr 2013 02:21:09 +0000 Subject: [PATCH] Test case for r180238. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180245 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/MC/Mips/micromips-shift-instructions.s | 22 +++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 test/MC/Mips/micromips-shift-instructions.s diff --git a/test/MC/Mips/micromips-shift-instructions.s b/test/MC/Mips/micromips-shift-instructions.s new file mode 100644 index 00000000000..3b5060f5280 --- /dev/null +++ b/test/MC/Mips/micromips-shift-instructions.s @@ -0,0 +1,22 @@ +# RUN: llvm-mc %s -triple=mipsel -show-encoding -mcpu=mips32r2 -mattr=micromips | FileCheck %s +# Check that the assembler can handle the documented syntax +# for shift instructions. +#------------------------------------------------------------------------------ +# Shift Instructions +#------------------------------------------------------------------------------ +# CHECK: sll $4, $3, 7 # encoding: [0x00,0x38,0x83,0x00] +# CHECK: sllv $2, $3, $5 # encoding: [0x10,0x10,0x65,0x00] +# CHECK: sra $4, $3, 7 # encoding: [0x80,0x38,0x83,0x00] +# CHECK: srav $2, $3, $5 # encoding: [0x90,0x10,0x65,0x00] +# CHECK: srl $4, $3, 7 # encoding: [0x40,0x38,0x83,0x00] +# CHECK: srlv $2, $3, $5 # encoding: [0x50,0x10,0x65,0x00] +# CHECK: rotr $9, $6, 7 # encoding: [0xc0,0x38,0x26,0x01] +# CHECK: rotrv $9, $6, $7 # encoding: [0xd0,0x48,0xc7,0x00] + sll $4, $3, 7 + sllv $2, $3, $5 + sra $4, $3, 7 + srav $2, $3, $5 + srl $4, $3, 7 + srlv $2, $3, $5 + rotr $9, $6, 7 + rotrv $9, $6, $7