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More closely follow libgcc, which has code after the `ret' instruction to
release the stack segment and reset the stack pointer. Place the code in its own MBB to make the verifier happy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141859 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1336,15 +1336,28 @@ X86FrameLowering::adjustForSegmentedStacks(MachineFunction &MF) const {
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if (Is64Bit)
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IsNested = HasNestArgument(&MF);
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// The MOV R10, RAX needs to be in a different block, since the RET we emit in
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// allocMBB needs to be last (terminating) instruction.
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MachineBasicBlock *restoreR10MBB = NULL;
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if (IsNested)
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restoreR10MBB = MF.CreateMachineBasicBlock();
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for (MachineBasicBlock::livein_iterator i = prologueMBB.livein_begin(),
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e = prologueMBB.livein_end(); i != e; i++) {
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allocMBB->addLiveIn(*i);
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checkMBB->addLiveIn(*i);
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if (IsNested)
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restoreR10MBB->addLiveIn(*i);
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}
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if (IsNested) {
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allocMBB->addLiveIn(X86::R10);
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restoreR10MBB->addLiveIn(X86::RAX);
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}
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if (IsNested)
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allocMBB->addLiveIn(X86::R10);
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MF.push_front(restoreR10MBB);
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MF.push_front(allocMBB);
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MF.push_front(checkMBB);
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@ -1414,13 +1427,19 @@ X86FrameLowering::adjustForSegmentedStacks(MachineFunction &MF) const {
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if (!Is64Bit)
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BuildMI(allocMBB, DL, TII.get(X86::ADD32ri), X86::ESP).addReg(X86::ESP)
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.addImm(8);
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if (Is64Bit && IsNested)
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BuildMI(allocMBB, DL, TII.get(X86::MOV64rr), X86::R10).addReg(X86::RAX);
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BuildMI(allocMBB, DL, TII.get(X86::RET));
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allocMBB->addSuccessor(&prologueMBB);
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if (IsNested)
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BuildMI(restoreR10MBB, DL, TII.get(X86::MOV64rr), X86::R10)
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.addReg(X86::RAX);
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if (IsNested) {
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allocMBB->addSuccessor(restoreR10MBB);
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restoreR10MBB->addSuccessor(&prologueMBB);
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} else {
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allocMBB->addSuccessor(&prologueMBB);
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}
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checkMBB->addSuccessor(allocMBB);
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checkMBB->addSuccessor(&prologueMBB);
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@ -81,7 +81,7 @@ define i32 @test_nested(i32 * nest %closure, i32 %other) {
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; X64-NEXT: movabsq $0, %r10
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; X64-NEXT: movabsq $0, %r11
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; X64-NEXT: callq __morestack
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; X64-NEXT: movq %rax, %r10
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; X64-NEXT: ret
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; X64: movq %rax, %r10
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}
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