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[FastISel][AArch64] Add support for fabs intrinsic.
Lower the llvm.fabs intrinsic to the 'fabs' MI instruction. This fixes rdar://problem/18946552. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221729 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3299,6 +3299,32 @@ bool AArch64FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
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updateValueMap(II, CLI.ResultReg);
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return true;
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}
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case Intrinsic::fabs: {
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MVT VT;
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if (!isTypeLegal(II->getType(), VT))
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return false;
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unsigned Opc;
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switch (VT.SimpleTy) {
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default:
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return false;
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case MVT::f32:
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Opc = AArch64::FABSSr;
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break;
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case MVT::f64:
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Opc = AArch64::FABSDr;
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break;
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}
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unsigned SrcReg = getRegForValue(II->getOperand(0));
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if (!SrcReg)
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return false;
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bool SrcRegIsKill = hasTrivialKill(II->getOperand(0));
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unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
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.addReg(SrcReg, getKillRegState(SrcRegIsKill));
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updateValueMap(II, ResultReg);
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return true;
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}
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case Intrinsic::trap: {
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::BRK))
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.addImm(1);
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19
test/CodeGen/AArch64/fast-isel-intrinsic.ll
Normal file
19
test/CodeGen/AArch64/fast-isel-intrinsic.ll
Normal file
@ -0,0 +1,19 @@
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; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -verify-machineinstrs < %s | FileCheck %s
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define float @fabs_f32(float %a) {
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; CHECK-LABEL: fabs_f32
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; CHECK: fabs s0, s0
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%1 = call float @llvm.fabs.f32(float %a)
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ret float %1
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}
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define double @fabs_f64(double %a) {
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; CHECK-LABEL: fabs_f64
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; CHECK: fabs d0, d0
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%1 = call double @llvm.fabs.f64(double %a)
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ret double %1
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}
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declare double @llvm.fabs.f64(double)
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declare float @llvm.fabs.f32(float)
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