RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2025-03-02 15:45:44 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[ARM] Fix integer UB in MVE load/store immediate handling.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364635 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Tatham 2019-06-28 09:28:39 +00:00
parent 144fab93ff
commit 4f77b3ddf3
2 changed files with 9 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
View File

@ -4182,7 +4182,7 @@ static DecodeStatus DecodeT2Imm7(MCInst &Inst, unsigned Val,
else if (!(Val & 0x80))
imm *= -1;
if (imm != INT32_MIN)
imm <<= shift;
imm *= (1U << shift);
Inst.addOperand(MCOperand::createImm(imm));
return MCDisassembler::Success;
@ -4448,7 +4448,7 @@ static DecodeStatus DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn,
imm *= -1;
}
if (imm != INT32_MIN)
imm <<= shift;
imm *= (1U << shift);
Inst.addOperand(MCOperand::createImm(imm));
return S;

11
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
View File

@ -1621,12 +1621,15 @@ getT2AddrModeImmOpValue(const MCInst &MI, unsigned OpNum,
// If the immediate is B bits long, we need B+1 bits in order
// to represent the (inverse of the) sign bit.
Value <<= (Bits + 1);
int32_t tmp = (int32_t)MO2.getImm() >> Shift;
if (tmp < 0)
int32_t tmp = (int32_t)MO2.getImm();
if (tmp == INT32_MIN) { // represents subtracting zero rather than adding it
tmp = 0;
} else if (tmp < 0) {
tmp = abs(tmp);
else
} else {
Value |= (1U << Bits); // Set the ADD bit
Value |= tmp & ((1U << Bits) - 1);
}
Value |= (tmp >> Shift) & ((1U << Bits) - 1);
return Value;
}