mirror of
https://github.com/RPCS3/llvm.git
synced 2026-07-18 21:24:32 -04:00
[WebAssembly] Update SIMD binary arithmetic
Add missing SIMD types (v2f64) and binary ops. Also adds tablegen support for automatically prepending prefix byte to SIMD opcodes. Differential Revision: https://reviews.llvm.org/D50292 Patch by Thomas Lively git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339186 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -256,7 +256,9 @@ static void FixEndsAtEndOfFunction(
|
||||
case MVT::v16i8:
|
||||
case MVT::v8i16:
|
||||
case MVT::v4i32:
|
||||
case MVT::v2i64:
|
||||
case MVT::v4f32:
|
||||
case MVT::v2f64:
|
||||
retType = WebAssembly::ExprType::V128;
|
||||
break;
|
||||
case MVT::ExceptRef: retType = WebAssembly::ExprType::ExceptRef; break;
|
||||
|
||||
Reference in New Issue
Block a user