Use continue in the use-processing loop to make it clear what the early exits

are, simplify logic, and cause things to not be nested as deeply.  This also
uses MRI->areAliases instead of an explicit loop.

No functionality change, just code cleanup.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23296 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-09-09 20:29:51 +00:00
parent 39ee1ac7e5
commit 50ea01ed5b

View File

@ -314,21 +314,41 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
// Process all of the spilled uses and all non spilled reg references.
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI.getOperand(i);
if (MO.isRegister() && MO.getReg() &&
MRegisterInfo::isPhysicalRegister(MO.getReg()))
PhysRegsUsed[MO.getReg()] = true;
else if (MO.isRegister() && MO.getReg() &&
MRegisterInfo::isVirtualRegister(MO.getReg())) {
unsigned VirtReg = MO.getReg();
if (!MO.isRegister() || MO.getReg() == 0)
continue; // Ignore non-register operands.
if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
// Ignore physregs for spilling, but remember that it is used by this
// function.
PhysRegsUsed[MO.getReg()] = true;
continue;
}
assert(MRegisterInfo::isVirtualRegister(MO.getReg()) &&
"Not a virtual or a physical register?");
unsigned VirtReg = MO.getReg();
if (!VRM.hasStackSlot(VirtReg)) {
// This virtual register was assigned a physreg!
unsigned Phys = VRM.getPhys(VirtReg);
PhysRegsUsed[Phys] = true;
MI.SetMachineOperandReg(i, Phys);
} else {
// Is this virtual register a spilled value?
if (MO.isUse()) {
continue;
}
// This virtual register is now known to be a spilled value.
if (!MO.isUse())
continue; // Handle defs in the loop below (handle use&def here though)
// If this is both a def and a use, we need to emit a store to the
// stack slot after the instruction. Keep track of D&U operands
// because we are about to change it to a physreg here.
if (MO.isDef()) {
// Remember that this was a def-and-use operand, and that the
// stack slot is live after this instruction executes.
DefAndUseVReg.push_back(std::make_pair(i, VirtReg));
}
int StackSlot = VRM.getStackSlot(VirtReg);
unsigned PhysReg;
@ -361,7 +381,9 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
ReusedOperands.push_back(ReusedOp(i, StackSlot, PhysReg,
VRM.getPhys(VirtReg)));
++NumReused;
} else {
continue;
}
// Otherwise, reload it and remember that we have it.
PhysReg = VRM.getPhys(VirtReg);
@ -379,8 +401,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
} else {
ReusedOp &Op = ReusedOperands[ro];
unsigned PRRU = Op.PhysRegReused;
for (const unsigned *AS = MRI->getAliasSet(PRRU); *AS; ++AS)
if (*AS == PhysReg) {
if (MRI->areAliases(PRRU, PhysReg)) {
// Okay, we found out that an alias of a reused register
// was used. This isn't good because it means we have
// to undo a previous reuse.
@ -426,19 +447,6 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
DEBUG(std::cerr << '\t' << *prior(MII));
}
// If this is both a def and a use, we need to emit a store to the
// stack slot after the instruction. Keep track of D&U operands
// because we already changed it to a physreg here.
if (MO.isDef()) {
// Remember that this was a def-and-use operand, and that the
// stack slot is live after this instruction executes.
DefAndUseVReg.push_back(std::make_pair(i, VirtReg));
}
}
}
}
}
// Loop over all of the implicit defs, clearing them from our available
// sets.
for (const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode());