RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2024-12-27 14:45:50 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[PowerPC] Support lmw/stmw in the asm parser

Browse Source 
This adds support for the load/store multiple instructions,
currently used by the asm parser only.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185564 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ulrich Weigand 2013-07-03 18:29:47 +00:00
parent 33efedc048
commit 51f558c9ae
2 changed files with 14 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/PowerPC/PPCInstrInfo.td
View File

@ -1378,6 +1378,10 @@ def LFIWZX : XForm_25<31, 887, (outs f8rc:$frD), (ins memrr:$src),
[(set f64:$frD, (PPClfiwzx xoaddr:$src))]>;
}
// Load Multiple
def LMW : DForm_1<46, (outs gprc:$rD), (ins memri:$src),
"lmw $rD, $src", LdStLMW, []>;
//===----------------------------------------------------------------------===//
// PPC32 Store Instructions.
//
@ -1508,6 +1512,10 @@ def : Pat<(pre_store f32:$rS, iPTR:$ptrreg, iPTR:$ptroff),
def : Pat<(pre_store f64:$rS, iPTR:$ptrreg, iPTR:$ptroff),
(STFDUX $rS, $ptrreg, $ptroff)>;
// Store Multiple
def STMW : DForm_1<47, (outs), (ins gprc:$rS, memri:$dst),
"stmw $rS, $dst", LdStLMW, []>;
def SYNC : XForm_24_sync<31, 598, (outs), (ins i32imm:$L),
"sync $L", LdStSync, []>;
def : Pat<(int_ppc_sync), (SYNC 0)>;

7
test/MC/PowerPC/ppc64-encoding.s
View File

@ -177,7 +177,12 @@
# CHECK: stdbrx 2, 3, 4 # encoding: [0x7c,0x43,0x25,0x28]
stdbrx 2, 3, 4
# FIXME: Fixed-point load and store multiple instructions
# Fixed-point load and store multiple instructions
# CHECK: lmw 2, 128(1) # encoding: [0xb8,0x41,0x00,0x80]
lmw 2, 128(1)
# CHECK: stmw 2, 128(1) # encoding: [0xbc,0x41,0x00,0x80]
stmw 2, 128(1)
# FIXME: Fixed-point move assist instructions