RPCS3/llvm
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm.git synced 2026-07-01 21:04:04 -04:00
Code Issues Packages Projects Releases 10 Wiki Activity

[HardwareLoops] Optimisation remarks

Browse Source 
This adds the initial plumbing to support optimisation remarks in
the IR hardware-loop pass.

I have left a todo in a comment where we can improve the reporting,
and will iterate on that now that we have this initial support in.

Differential Revision: https://reviews.llvm.org/D68579

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@374980 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sjoerd Meijer
2019-10-16 09:09:55 +00:00
parent 8585d68b6e
commit 52192eb65c
4 changed files with 102 additions and 30 deletions
Download Patch File Download Diff File Expand all files Collapse all files
test/CodeGen/ARM/O3-pipeline.ll
+3
View File
@@ -52,6 +52,9 @@
; CHECK-NEXT: Dominator Tree Construction
; CHECK-NEXT: Natural Loop Information
; CHECK-NEXT: Scalar Evolution Analysis
; CHECK-NEXT: Lazy Branch Probability Analysis
; CHECK-NEXT: Lazy Block Frequency Analysis
; CHECK-NEXT: Optimization Remark Emitter
; CHECK-NEXT: Hardware Loop Insertion
; CHECK-NEXT: Scalar Evolution Analysis
; CHECK-NEXT: Loop Pass Manager
test/Transforms/HardwareLoops/ARM/structure.ll
+6 -1
View File
@@ -1,7 +1,8 @@
; RUN: opt -mtriple=thumbv8.1m.main-arm-none-eabi -hardware-loops %s -S -o - | FileCheck %s
; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi %s -o - | FileCheck %s --check-prefix=CHECK-LLC
; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi %s -o - -pass-remarks-analysis=hardware-loops 2>&1 | FileCheck %s --check-prefix=CHECK-LLC
; RUN: opt -mtriple=thumbv8.1m.main -loop-unroll -unroll-remainder=false -S < %s | llc -mtriple=thumbv8.1m.main | FileCheck %s --check-prefix=CHECK-UNROLL
; CHECK-LLC: remark: <unknown>:0:0: hardware-loop not created: it's not profitable to create a hardware-loop
; CHECK-LABEL: early_exit
; CHECK-NOT: llvm.set.loop.iterations
; CHECK-NOT: llvm.loop.decrement
@@ -46,6 +47,7 @@ do.end:
; CHECK-NOT: [[LOOP_DEC1:%[^ ]+]] = call i1 @llvm.loop.decrement.i32(i32 1)
; CHECK-NOT: br i1 [[LOOP_DEC1]], label %while.cond1.preheader.us, label %while.end7
; CHECK-LLC: remark: <unknown>:0:0: hardware-loop not created: nested hardware-loops not supported
; CHECK-LLC: nested:
; CHECK-LLC-NOT: mov lr, r1
; CHECK-LLC: dls lr, r1
@@ -176,6 +178,9 @@ while.end7:
ret void
}
; CHECK-LLC: remark: <unknown>:0:0: hardware-loop not created: loop is not a candidate
; CHECK-LLC: remark: <unknown>:0:0: hardware-loop not created: nested hardware-loops not supported
; CHECK-LABEL: not_rotated
; CHECK-NOT: call void @llvm.set.loop.iterations
; CHECK-NOT: call i32 @llvm.loop.decrement.i32
test/Transforms/HardwareLoops/unconditional-latch.ll
+7 -1
View File
@@ -1,6 +1,12 @@
; RUN: opt -force-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32 -hardware-loops -S %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ALLOW
; RUN: opt -force-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32 -hardware-loops -force-hardware-loop-guard=true -S %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ALLOW
; RUN: opt -force-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32 -force-hardware-loop-phi=true -hardware-loops -S %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LATCH
;
; RUN: opt -force-hardware-loops=true -hardware-loop-decrement=1 \
; RUN: -hardware-loop-counter-bitwidth=32 -force-hardware-loop-phi=true \
; RUN: -hardware-loops -S -pass-remarks-analysis=hardware-loops %s -o - \
; RUN: 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-LATCH
; CHECK-LATCH: remark: <unknown>:0:0: hardware-loop not created: loop is not a candidate
; CHECK-LABEL: not_rotated
; CHECK-LATCH-NOT: call void @llvm.set.loop.iterations