Fix PR3149. If an early clobber def is a physical register and it is tied to an input operand, it effectively extends the live range of the physical register. Currently we do not have a good way to represent this.

172     %ECX<def> = MOV32rr %reg1039<kill>
180     INLINEASM <es:subl $5,$1
        sbbl $3,$0>, 10, %EAX<def>, 14, %ECX<earlyclobber,def>, 9, %EAX<kill>,
36, <fi#0>, 1, %reg0, 0, 9, %ECX<kill>, 36, <fi#1>, 1, %reg0, 0
188     %EAX<def> = MOV32rr %EAX<kill>
196     %ECX<def> = MOV32rr %ECX<kill>
204     %ECX<def> = MOV32rr %ECX<kill>
212     %EAX<def> = MOV32rr %EAX<kill>
220     %EAX<def> = MOV32rr %EAX
228     %reg1039<def> = MOV32rr %ECX<kill>

The early clobber operand ties ECX input to the ECX def.

The live interval of ECX is represented as this:
%reg20,inf = [46,47:1)[174,230:0)  0@174-(230) 1@46-(47)

The right way to represent this is something like
%reg20,inf = [46,47:2)[174,182:1)[181:230:0)  0@174-(182) 1@181-230 @2@46-(47)

Of course that won't work since that means overlapping live ranges defined by two val#.

The workaround for now is to add a bit to val# which says the val# is redefined by a early clobber def somewhere. This prevents the move at 228 from being optimized away by SimpleRegisterCoalescing::AdjustCopiesBackFrom.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61259 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2008-12-19 20:58:01 +00:00
parent de8c611c08
commit 5379f412bc
5 changed files with 69 additions and 11 deletions

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@ -38,16 +38,19 @@ namespace llvm {
/// - or reg # of the definition if it's a stack slot liveinterval.
/// copy - Copy iff val# is defined by a copy; zero otherwise.
/// hasPHIKill - One or more of the kills are PHI nodes.
/// redefByEC - Re-defined by early clobber somewhere during the live range.
/// kills - Instruction # of the kills.
struct VNInfo {
unsigned id;
unsigned def;
MachineInstr *copy;
bool hasPHIKill;
bool hasPHIKill : 1;
bool redefByEC : 1;
SmallVector<unsigned, 4> kills;
VNInfo() : id(~1U), def(~1U), copy(0), hasPHIKill(false) {}
VNInfo()
: id(~1U), def(~1U), copy(0), hasPHIKill(false), redefByEC(false) {}
VNInfo(unsigned i, unsigned d, MachineInstr *c)
: id(i), def(d), copy(c), hasPHIKill(false) {}
: id(i), def(d), copy(c), hasPHIKill(false), redefByEC(false) {}
};
/// LiveRange structure - This represents a simple register range in the
@ -177,6 +180,7 @@ namespace llvm {
DstValNo->def = SrcValNo->def;
DstValNo->copy = SrcValNo->copy;
DstValNo->hasPHIKill = SrcValNo->hasPHIKill;
DstValNo->redefByEC = SrcValNo->redefByEC;
DstValNo->kills = SrcValNo->kills;
}

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@ -360,6 +360,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
mi->getOpcode() == TargetInstrInfo::INSERT_SUBREG ||
tii_->isMoveInstr(*mi, SrcReg, DstReg))
CopyMI = mi;
// Earlyclobbers move back one.
ValNo = interval.getNextValue(defIndex, CopyMI, VNInfoAllocator);
assert(ValNo->id == 0 && "First value in interval is not 0?");
@ -435,9 +436,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
assert(interval.containsOneValue());
unsigned DefIndex = getDefIndex(interval.getValNumInfo(0)->def);
unsigned RedefIndex = getDefIndex(MIIdx);
// Earlyclobbers move back one.
if (MO.isEarlyClobber())
RedefIndex = getUseIndex(MIIdx);
// It cannot be an early clobber MO.
assert(!MO.isEarlyClobber() && "Unexpected early clobber!");
const LiveRange *OldLR = interval.getLiveRangeContaining(RedefIndex-1);
VNInfo *OldValNo = OldLR->valno;
@ -505,9 +505,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
// live until the end of the block. We've already taken care of the
// rest of the live range.
unsigned defIndex = getDefIndex(MIIdx);
// Earlyclobbers move back one.
if (MO.isEarlyClobber())
defIndex = getUseIndex(MIIdx);
// It cannot be an early clobber MO.
assert(!MO.isEarlyClobber() && "Unexpected early clobber!");
VNInfo *ValNo;
MachineInstr *CopyMI = NULL;
@ -592,8 +591,11 @@ exit:
// Already exists? Extend old live interval.
LiveInterval::iterator OldLR = interval.FindLiveRangeContaining(start);
VNInfo *ValNo = (OldLR != interval.end())
bool Extend = OldLR != interval.end();
VNInfo *ValNo = Extend
? OldLR->valno : interval.getNextValue(start, CopyMI, VNInfoAllocator);
if (MO.isEarlyClobber() && Extend)
ValNo->redefByEC = true;
LiveRange LR(start, end, ValNo);
interval.addRange(LR);
interval.addKill(LR.valno, end);

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@ -119,6 +119,26 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA,
if (ALR == IntA.end()) // Should never happen!
return false;
VNInfo *AValNo = ALR->valno;
// If it's re-defined by an early clobber somewhere in the live range, then
// it's not safe to eliminate the copy. FIXME: This is a temporary workaround.
// See PR3149:
// 172 %ECX<def> = MOV32rr %reg1039<kill>
// 180 INLINEASM <es:subl $5,$1
// sbbl $3,$0>, 10, %EAX<def>, 14, %ECX<earlyclobber,def>, 9, %EAX<kill>,
// 36, <fi#0>, 1, %reg0, 0, 9, %ECX<kill>, 36, <fi#1>, 1, %reg0, 0
// 188 %EAX<def> = MOV32rr %EAX<kill>
// 196 %ECX<def> = MOV32rr %ECX<kill>
// 204 %ECX<def> = MOV32rr %ECX<kill>
// 212 %EAX<def> = MOV32rr %EAX<kill>
// 220 %EAX<def> = MOV32rr %EAX
// 228 %reg1039<def> = MOV32rr %ECX<kill>
// The early clobber operand ties ECX input to the ECX def.
//
// The live interval of ECX is represented as this:
// %reg20,inf = [46,47:1)[174,230:0) 0@174-(230) 1@46-(47)
// The coalescer has no idea there was a def in the middle of [174,230].
if (AValNo->redefByEC)
return false;
// If AValNo is defined as a copy from IntB, we can potentially process this.
// Get the instruction that defines this value number.

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@ -17,7 +17,7 @@ target triple = "powerpc-apple-darwin8.8.0"
; return ((long long)Y << 32) | X;
;}
define i64 @test(i32 %A, i32 %B, i32 %C) {
define i64 @test(i32 %A, i32 %B, i32 %C) nounwind {
entry:
%Y = alloca i32, align 4 ; <i32*> [#uses=2]
%tmp4 = call i32 asm "subf${3:I}c $1,$4,$3\0A\09subfze $0,$2", "=r,=*&r,r,rI,r"( i32* %Y, i32 %A, i32 %B, i32 %C ) ; <i32> [#uses=1]

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@ -0,0 +1,32 @@
; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | %prcontext End 1 | grep {movl.*%ecx}
; PR3149
@"\01LC" = internal constant [7 x i8] c"n0=%d\0A\00" ; <[7 x i8]*> [#uses=1]
@llvm.used = appending global [1 x i8*] [ i8* bitcast (i32 (i64, i64)* @umoddi3 to i8*) ], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
define i32 @umoddi3(i64 %u, i64 %v) nounwind noinline {
entry:
%0 = trunc i64 %v to i32 ; <i32> [#uses=2]
%1 = trunc i64 %u to i32 ; <i32> [#uses=4]
%2 = lshr i64 %u, 32 ; <i64> [#uses=1]
%3 = trunc i64 %2 to i32 ; <i32> [#uses=2]
%4 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([7 x i8]* @"\01LC", i32 0, i32 0), i32 %1) nounwind ; <i32> [#uses=0]
%5 = icmp ult i32 %1, %0 ; <i1> [#uses=1]
br i1 %5, label %bb2, label %bb
bb: ; preds = %entry
%6 = lshr i64 %v, 32 ; <i64> [#uses=1]
%7 = trunc i64 %6 to i32 ; <i32> [#uses=1]
%asmtmp = tail call { i32, i32 } asm "subl $5,$1\0A\09sbbl $3,$0", "=r,=&r,0,imr,1,imr,~{dirflag},~{fpsr},~{flags}"(i32 %3, i32 %7, i32 %1, i32 %0) nounwind ; <{ i32, i32 }> [#uses=2]
%asmresult = extractvalue { i32, i32 } %asmtmp, 0 ; <i32> [#uses=1]
%asmresult1 = extractvalue { i32, i32 } %asmtmp, 1 ; <i32> [#uses=1]
br label %bb2
bb2: ; preds = %bb, %entry
%n1.0 = phi i32 [ %asmresult, %bb ], [ %3, %entry ] ; <i32> [#uses=1]
%n0.0 = phi i32 [ %asmresult1, %bb ], [ %1, %entry ] ; <i32> [#uses=1]
%8 = add i32 %n0.0, %n1.0 ; <i32> [#uses=1]
ret i32 %8
}
declare i32 @printf(i8*, ...) nounwind