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Handle call-clobbered ymm registers on Win64.

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The Win64 calling convention has xmm6-15 as callee-saved while still
clobbering all ymm registers.

Add a YMM_HI_6_15 pseudo-register that aliases the clobbered part of the
ymm registers, and mark that as call-clobbered.  This allows live xmm
registers across calls.

This hack wouldn't be necessary with RegisterMask operands representing
the call clobbers, but they are not quite operational yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149088 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-01-26 22:59:28 +00:00
parent f26475af97
commit 53fa56e8dc
3 changed files with 56 additions and 1 deletions
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2
lib/Target/X86/X86InstrControl.td
View File

@ -249,7 +249,7 @@ let isCall = 1, isCodeGenOnly = 1 in
let Defs = [RAX, RCX, RDX, R8, R9, R10, R11,
FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, ST1,
MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, EFLAGS],
XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, YMM_HI_6_15, EFLAGS],
Uses = [RSP] in {
def WINCALL64pcrel32 : Ii32PCRel<0xE8, RawFrm,
(outs), (ins i64i32imm_pcrel:$dst, variable_ops),

7
lib/Target/X86/X86RegisterInfo.td
View File

@ -206,6 +206,13 @@ let Namespace = "X86" in {
def YMM15: RegisterWithSubRegs<"ymm15", [XMM15]>, DwarfRegAlias<XMM15>;
}
// Pseudo-register that aliases the high part of ymm6-ymm15 that is clobbered
// by win64 calls. Doesn't alias the callee-saved xmm6-xmm15.
def YMM_HI_6_15 : Register<"ymmhi-6-15"> {
let Aliases = [YMM6, YMM7, YMM8, YMM9, YMM10, YMM11, YMM12, YMM13, YMM14,
YMM15];
}
class STRegister<string Name, list<Register> A> : Register<Name> {
let Aliases = A;
}

48
test/CodeGen/X86/avx-win64.ll Normal file
View File

@ -0,0 +1,48 @@
; RUN: llc < %s -mcpu=corei7-avx -mattr=+avx | FileCheck %s
; PR11862
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-pc-win32"
; This function has live ymm registers across a win64 call.
; The ymm6-15 registers are still call-clobbered even if xmm6-15 are callee-saved.
; Verify that callee-saved registers are not being used.
; CHECK: f___vyf
; CHECK: pushq %rbp
; CHECK-NOT: vmovaps{{.*}}(%r
; CHECK: vmovmsk
; CHECK: vmovaps %ymm{{.*}}(%r
; CHECK: vmovaps %ymm{{.*}}(%r
; CHECK: call
; Two reloads. It's OK if these get folded.
; CHECK: vmovaps {{.*\(%r.*}}, %ymm
; CHECK: vmovaps {{.*\(%r.*}}, %ymm
; CHECK: blend
define <8 x float> @f___vyf(<8 x float> %x, <8 x i32> %__mask) nounwind readnone {
allocas:
%bincmp = fcmp oeq <8 x float> %x, zeroinitializer
%val_to_boolvec32 = sext <8 x i1> %bincmp to <8 x i32>
%"~test" = xor <8 x i32> %val_to_boolvec32, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>
%"internal_mask&function_mask25" = and <8 x i32> %"~test", %__mask
%floatmask.i46 = bitcast <8 x i32> %"internal_mask&function_mask25" to <8 x float>
%v.i47 = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %floatmask.i46) nounwind readnone
%any_mm_cmp27 = icmp eq i32 %v.i47, 0
br i1 %any_mm_cmp27, label %safe_if_after_false, label %safe_if_run_false
safe_if_run_false: ; preds = %allocas
%binop = fadd <8 x float> %x, <float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00>
%calltmp = call <8 x float> @f___vyf(<8 x float> %binop, <8 x i32> %"internal_mask&function_mask25")
%binop33 = fadd <8 x float> %calltmp, %x
%mask_as_float.i48 = bitcast <8 x i32> %"~test" to <8 x float>
%blend.i52 = call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> %x, <8 x float> %binop33, <8 x float> %mask_as_float.i48) nounwind
br label %safe_if_after_false
safe_if_after_false: ; preds = %safe_if_run_false, %allocas
%0 = phi <8 x float> [ %x, %allocas ], [ %blend.i52, %safe_if_run_false ]
ret <8 x float> %0
}
declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone
declare <8 x float> @llvm.x86.avx.maskload.ps.256(i8*, <8 x float>) nounwind readonly
declare void @llvm.x86.avx.maskstore.ps.256(i8*, <8 x float>, <8 x float>) nounwind
declare <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float>, <8 x float>, <8 x float>) nounwind readnone