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generalize helper function of MergeConsecutiveStores to handle vector types (NFCI)
This was part of D7208 (r227242), but that commit was reverted because it exposed a bug in AArch64 lowering. I should have that fixed and the rest of the commit reinstated soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246493 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -410,7 +410,7 @@ namespace {
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/// vector elements, try to merge them into one larger store.
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/// \return True if a merged store was created.
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bool MergeStoresOfConstantsOrVecElts(SmallVectorImpl<MemOpLink> &StoreNodes,
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EVT MemVT, unsigned NumElem,
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EVT MemVT, unsigned NumStores,
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bool IsConstantSrc, bool UseVector);
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/// This is a helper function for MergeConsecutiveStores.
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@ -10708,16 +10708,16 @@ SDValue DAGCombiner::getMergedConstantVectorStore(SelectionDAG &DAG,
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bool DAGCombiner::MergeStoresOfConstantsOrVecElts(
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SmallVectorImpl<MemOpLink> &StoreNodes, EVT MemVT,
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unsigned NumElem, bool IsConstantSrc, bool UseVector) {
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unsigned NumStores, bool IsConstantSrc, bool UseVector) {
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// Make sure we have something to merge.
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if (NumElem < 2)
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if (NumStores < 2)
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return false;
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int64_t ElementSizeBytes = MemVT.getSizeInBits() / 8;
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LSBaseSDNode *FirstInChain = StoreNodes[0].MemNode;
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unsigned LatestNodeUsed = 0;
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for (unsigned i=0; i < NumElem; ++i) {
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for (unsigned i=0; i < NumStores; ++i) {
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// Find a chain for the new wide-store operand. Notice that some
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// of the store nodes that we found may not be selected for inclusion
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// in the wide store. The chain we use needs to be the chain of the
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@ -10732,38 +10732,45 @@ bool DAGCombiner::MergeStoresOfConstantsOrVecElts(
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SDValue StoredVal;
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if (UseVector) {
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// Find a legal type for the vector store.
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EVT Ty = EVT::getVectorVT(*DAG.getContext(), MemVT, NumElem);
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bool IsVec = MemVT.isVector();
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unsigned Elts = NumStores;
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if (IsVec) {
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// When merging vector stores, get the total number of elements.
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Elts *= MemVT.getVectorNumElements();
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}
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// Get the type for the merged vector store.
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EVT Ty = EVT::getVectorVT(*DAG.getContext(), MemVT.getScalarType(), Elts);
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assert(TLI.isTypeLegal(Ty) && "Illegal vector store");
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if (IsConstantSrc) {
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StoredVal = getMergedConstantVectorStore(DAG, DL, StoreNodes, Ty);
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} else {
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SmallVector<SDValue, 8> Ops;
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for (unsigned i = 0; i < NumElem ; ++i) {
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for (unsigned i = 0; i < NumStores; ++i) {
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StoreSDNode *St = cast<StoreSDNode>(StoreNodes[i].MemNode);
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SDValue Val = St->getValue();
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// All of the operands of a BUILD_VECTOR must have the same type.
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// All operands of BUILD_VECTOR / CONCAT_VECTOR must have the same type.
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if (Val.getValueType() != MemVT)
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return false;
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Ops.push_back(Val);
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}
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// Build the extracted vector elements back into a vector.
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StoredVal = DAG.getNode(ISD::BUILD_VECTOR, DL, Ty, Ops);
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}
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StoredVal = DAG.getNode(IsVec ? ISD::CONCAT_VECTORS : ISD::BUILD_VECTOR,
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DL, Ty, Ops); }
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} else {
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// We should always use a vector store when merging extracted vector
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// elements, so this path implies a store of constants.
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assert(IsConstantSrc && "Merged vector elements should use vector store");
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unsigned SizeInBits = NumElem * ElementSizeBytes * 8;
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unsigned SizeInBits = NumStores * ElementSizeBytes * 8;
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APInt StoreInt(SizeInBits, 0);
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// Construct a single integer constant which is made of the smaller
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// constant inputs.
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bool IsLE = DAG.getDataLayout().isLittleEndian();
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for (unsigned i = 0; i < NumElem ; ++i) {
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unsigned Idx = IsLE ? (NumElem - 1 - i) : i;
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for (unsigned i = 0; i < NumStores; ++i) {
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unsigned Idx = IsLE ? (NumStores - 1 - i) : i;
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StoreSDNode *St = cast<StoreSDNode>(StoreNodes[Idx].MemNode);
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SDValue Val = St->getValue();
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StoreInt <<= ElementSizeBytes * 8;
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@ -10790,7 +10797,7 @@ bool DAGCombiner::MergeStoresOfConstantsOrVecElts(
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// Replace the last store with the new store
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CombineTo(LatestOp, NewStore);
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// Erase all other stores.
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for (unsigned i = 0; i < NumElem ; ++i) {
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for (unsigned i = 0; i < NumStores; ++i) {
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if (StoreNodes[i].MemNode == LatestOp)
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continue;
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StoreSDNode *St = cast<StoreSDNode>(StoreNodes[i].MemNode);
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