mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-23 12:40:17 +00:00
Have TargetSelectionDAGInfo take a DataLayout initializer rather than
a TargetMachine since the only thing it wants is DataLayout. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210366 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
5beec3aa92
commit
5448320a20
@ -37,7 +37,7 @@ protected:
|
||||
const DataLayout *getDataLayout() const { return DL; }
|
||||
|
||||
public:
|
||||
explicit TargetSelectionDAGInfo(const TargetMachine &TM);
|
||||
explicit TargetSelectionDAGInfo(const DataLayout *DL);
|
||||
virtual ~TargetSelectionDAGInfo();
|
||||
|
||||
/// EmitTargetCodeForMemcpy - Emit target-specific code that performs a
|
||||
|
@ -15,8 +15,8 @@
|
||||
#include "llvm/Target/TargetMachine.h"
|
||||
using namespace llvm;
|
||||
|
||||
TargetSelectionDAGInfo::TargetSelectionDAGInfo(const TargetMachine &TM)
|
||||
: DL(TM.getDataLayout()) {
|
||||
TargetSelectionDAGInfo::TargetSelectionDAGInfo(const DataLayout *DL)
|
||||
: DL(DL) {
|
||||
}
|
||||
|
||||
TargetSelectionDAGInfo::~TargetSelectionDAGInfo() {
|
||||
|
@ -17,7 +17,7 @@ using namespace llvm;
|
||||
#define DEBUG_TYPE "aarch64-selectiondag-info"
|
||||
|
||||
AArch64SelectionDAGInfo::AArch64SelectionDAGInfo(const TargetMachine &TM)
|
||||
: TargetSelectionDAGInfo(TM),
|
||||
: TargetSelectionDAGInfo(TM.getDataLayout()),
|
||||
Subtarget(&TM.getSubtarget<AArch64Subtarget>()) {}
|
||||
|
||||
AArch64SelectionDAGInfo::~AArch64SelectionDAGInfo() {}
|
||||
|
@ -19,9 +19,8 @@ using namespace llvm;
|
||||
#define DEBUG_TYPE "arm-selectiondag-info"
|
||||
|
||||
ARMSelectionDAGInfo::ARMSelectionDAGInfo(const TargetMachine &TM)
|
||||
: TargetSelectionDAGInfo(TM),
|
||||
Subtarget(&TM.getSubtarget<ARMSubtarget>()) {
|
||||
}
|
||||
: TargetSelectionDAGInfo(TM.getDataLayout()),
|
||||
Subtarget(&TM.getSubtarget<ARMSubtarget>()) {}
|
||||
|
||||
ARMSelectionDAGInfo::~ARMSelectionDAGInfo() {
|
||||
}
|
||||
|
@ -18,10 +18,8 @@ using namespace llvm;
|
||||
|
||||
bool llvm::flag_aligned_memcpy;
|
||||
|
||||
HexagonSelectionDAGInfo::HexagonSelectionDAGInfo(const HexagonTargetMachine
|
||||
&TM)
|
||||
: TargetSelectionDAGInfo(TM) {
|
||||
}
|
||||
HexagonSelectionDAGInfo::HexagonSelectionDAGInfo(const HexagonTargetMachine &TM)
|
||||
: TargetSelectionDAGInfo(TM.getDataLayout()) {}
|
||||
|
||||
HexagonSelectionDAGInfo::~HexagonSelectionDAGInfo() {
|
||||
}
|
||||
|
@ -17,8 +17,7 @@ using namespace llvm;
|
||||
#define DEBUG_TYPE "msp430-selectiondag-info"
|
||||
|
||||
MSP430SelectionDAGInfo::MSP430SelectionDAGInfo(const MSP430TargetMachine &TM)
|
||||
: TargetSelectionDAGInfo(TM) {
|
||||
}
|
||||
: TargetSelectionDAGInfo(TM.getDataLayout()) {}
|
||||
|
||||
MSP430SelectionDAGInfo::~MSP430SelectionDAGInfo() {
|
||||
}
|
||||
|
@ -17,8 +17,7 @@ using namespace llvm;
|
||||
#define DEBUG_TYPE "mips-selectiondag-info"
|
||||
|
||||
MipsSelectionDAGInfo::MipsSelectionDAGInfo(const MipsTargetMachine &TM)
|
||||
: TargetSelectionDAGInfo(TM) {
|
||||
}
|
||||
: TargetSelectionDAGInfo(TM.getDataLayout()) {}
|
||||
|
||||
MipsSelectionDAGInfo::~MipsSelectionDAGInfo() {
|
||||
}
|
||||
|
@ -83,7 +83,7 @@ NVPTXTargetMachine::NVPTXTargetMachine(
|
||||
CodeGenOpt::Level OL, bool is64bit)
|
||||
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
|
||||
Subtarget(TT, CPU, FS, is64bit), DL(computeDataLayout(Subtarget)),
|
||||
InstrInfo(*this), TLInfo(*this), TSInfo(*this),
|
||||
InstrInfo(*this), TLInfo(*this), TSInfo(&DL),
|
||||
FrameLowering(
|
||||
*this, is64bit) /*FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0)*/ {
|
||||
initAsmInfo();
|
||||
|
@ -17,7 +17,7 @@ using namespace llvm;
|
||||
#define DEBUG_TYPE "powerpc-selectiondag-info"
|
||||
|
||||
PPCSelectionDAGInfo::PPCSelectionDAGInfo(const PPCTargetMachine &TM)
|
||||
: TargetSelectionDAGInfo(TM) {
|
||||
: TargetSelectionDAGInfo(TM.getDataLayout()) {
|
||||
}
|
||||
|
||||
PPCSelectionDAGInfo::~PPCSelectionDAGInfo() {
|
||||
|
@ -17,7 +17,7 @@ using namespace llvm;
|
||||
#define DEBUG_TYPE "sparc-selectiondag-info"
|
||||
|
||||
SparcSelectionDAGInfo::SparcSelectionDAGInfo(const SparcTargetMachine &TM)
|
||||
: TargetSelectionDAGInfo(TM) {
|
||||
: TargetSelectionDAGInfo(TM.getDataLayout()) {
|
||||
}
|
||||
|
||||
SparcSelectionDAGInfo::~SparcSelectionDAGInfo() {
|
||||
|
@ -20,7 +20,7 @@ using namespace llvm;
|
||||
|
||||
SystemZSelectionDAGInfo::
|
||||
SystemZSelectionDAGInfo(const SystemZTargetMachine &TM)
|
||||
: TargetSelectionDAGInfo(TM) {
|
||||
: TargetSelectionDAGInfo(TM.getDataLayout()) {
|
||||
}
|
||||
|
||||
SystemZSelectionDAGInfo::~SystemZSelectionDAGInfo() {
|
||||
|
@ -19,7 +19,7 @@ using namespace llvm;
|
||||
#define DEBUG_TYPE "x86-selectiondag-info"
|
||||
|
||||
X86SelectionDAGInfo::X86SelectionDAGInfo(const X86TargetMachine &TM) :
|
||||
TargetSelectionDAGInfo(TM),
|
||||
TargetSelectionDAGInfo(TM.getDataLayout()),
|
||||
Subtarget(&TM.getSubtarget<X86Subtarget>()),
|
||||
TLI(*TM.getTargetLowering()) {
|
||||
}
|
||||
|
@ -17,8 +17,7 @@ using namespace llvm;
|
||||
#define DEBUG_TYPE "xcore-selectiondag-info"
|
||||
|
||||
XCoreSelectionDAGInfo::XCoreSelectionDAGInfo(const XCoreTargetMachine &TM)
|
||||
: TargetSelectionDAGInfo(TM) {
|
||||
}
|
||||
: TargetSelectionDAGInfo(TM.getDataLayout()) {}
|
||||
|
||||
XCoreSelectionDAGInfo::~XCoreSelectionDAGInfo() {
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user