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Simplified some stack folding tests.
Replaced explicit pmovzx* intrinsic tests with general shuffles git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232286 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -721,55 +721,55 @@ define <4 x i32> @stack_fold_pmovzxbd(<16 x i8> %a0) {
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;CHECK-LABEL: stack_fold_pmovzxbd
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;CHECK: vpmovzxbd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8> %a0)
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ret <4 x i32> %2
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%2 = shufflevector <16 x i8> %a0, <16 x i8> zeroinitializer, <16 x i32> <i32 0, i32 16, i32 17, i32 18, i32 1, i32 19, i32 20, i32 21, i32 2, i32 22, i32 23, i32 24, i32 3, i32 25, i32 26, i32 27>
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%3 = bitcast <16 x i8> %2 to <4 x i32>
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ret <4 x i32> %3
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}
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declare <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8>) nounwind readnone
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define <2 x i64> @stack_fold_pmovzxbq(<16 x i8> %a0) {
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;CHECK-LABEL: stack_fold_pmovzxbq
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;CHECK: vpmovzxbq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8> %a0)
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ret <2 x i64> %2
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%2 = shufflevector <16 x i8> %a0, <16 x i8> zeroinitializer, <16 x i32> <i32 0, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 1, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>
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%3 = bitcast <16 x i8> %2 to <2 x i64>
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ret <2 x i64> %3
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}
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declare <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8>) nounwind readnone
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define <8 x i16> @stack_fold_pmovzxbw(<16 x i8> %a0) {
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;CHECK-LABEL: stack_fold_pmovzxbw
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;CHECK: vpmovzxbw {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8> %a0)
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ret <8 x i16> %2
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%2 = shufflevector <16 x i8> %a0, <16 x i8> zeroinitializer, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
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%3 = bitcast <16 x i8> %2 to <8 x i16>
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ret <8 x i16> %3
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}
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declare <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8>) nounwind readnone
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define <2 x i64> @stack_fold_pmovzxdq(<4 x i32> %a0) {
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;CHECK-LABEL: stack_fold_pmovzxdq
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;CHECK: vpmovzxdq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <2 x i64> @llvm.x86.sse41.pmovzxdq(<4 x i32> %a0)
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ret <2 x i64> %2
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%2 = shufflevector <4 x i32> %a0, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
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%3 = bitcast <4 x i32> %2 to <2 x i64>
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ret <2 x i64> %3
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}
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declare <2 x i64> @llvm.x86.sse41.pmovzxdq(<4 x i32>) nounwind readnone
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define <4 x i32> @stack_fold_pmovzxwd(<8 x i16> %a0) {
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;CHECK-LABEL: stack_fold_pmovzxwd
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;CHECK: vpmovzxwd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %a0)
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ret <4 x i32> %2
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%2 = shufflevector <8 x i16> %a0, <8 x i16> zeroinitializer, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
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%3 = bitcast <8 x i16> %2 to <4 x i32>
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ret <4 x i32> %3
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}
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declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone
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define <2 x i64> @stack_fold_pmovzxwq(<8 x i16> %a0) {
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;CHECK-LABEL: stack_fold_pmovzxwq
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;CHECK: vpmovzxwq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16> %a0)
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ret <2 x i64> %2
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%2 = shufflevector <8 x i16> %a0, <8 x i16> zeroinitializer, <8 x i32> <i32 0, i32 8, i32 9, i32 10, i32 1, i32 11, i32 12, i32 13>
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%3 = bitcast <8 x i16> %2 to <2 x i64>
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ret <2 x i64> %3
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}
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declare <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16>) nounwind readnone
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define <2 x i64> @stack_fold_pmuldq(<4 x i32> %a0, <4 x i32> %a1) {
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;CHECK-LABEL: stack_fold_pmuldq
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@ -721,55 +721,55 @@ define <4 x i32> @stack_fold_pmovzxbd(<16 x i8> %a0) {
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;CHECK-LABEL: stack_fold_pmovzxbd
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;CHECK: pmovzxbd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8> %a0)
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ret <4 x i32> %2
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%2 = shufflevector <16 x i8> %a0, <16 x i8> zeroinitializer, <16 x i32> <i32 0, i32 16, i32 17, i32 18, i32 1, i32 19, i32 20, i32 21, i32 2, i32 22, i32 23, i32 24, i32 3, i32 25, i32 26, i32 27>
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%3 = bitcast <16 x i8> %2 to <4 x i32>
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ret <4 x i32> %3
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}
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declare <4 x i32> @llvm.x86.sse41.pmovzxbd(<16 x i8>) nounwind readnone
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define <2 x i64> @stack_fold_pmovzxbq(<16 x i8> %a0) {
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;CHECK-LABEL: stack_fold_pmovzxbq
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;CHECK: pmovzxbq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8> %a0)
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ret <2 x i64> %2
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%2 = shufflevector <16 x i8> %a0, <16 x i8> zeroinitializer, <16 x i32> <i32 0, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 1, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28>
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%3 = bitcast <16 x i8> %2 to <2 x i64>
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ret <2 x i64> %3
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}
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declare <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8>) nounwind readnone
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define <8 x i16> @stack_fold_pmovzxbw(<16 x i8> %a0) {
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;CHECK-LABEL: stack_fold_pmovzxbw
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;CHECK: pmovzxbw {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8> %a0)
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ret <8 x i16> %2
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%2 = shufflevector <16 x i8> %a0, <16 x i8> zeroinitializer, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
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%3 = bitcast <16 x i8> %2 to <8 x i16>
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ret <8 x i16> %3
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}
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declare <8 x i16> @llvm.x86.sse41.pmovzxbw(<16 x i8>) nounwind readnone
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define <2 x i64> @stack_fold_pmovzxdq(<4 x i32> %a0) {
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;CHECK-LABEL: stack_fold_pmovzxdq
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;CHECK: pmovzxdq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <2 x i64> @llvm.x86.sse41.pmovzxdq(<4 x i32> %a0)
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ret <2 x i64> %2
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%2 = shufflevector <4 x i32> %a0, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
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%3 = bitcast <4 x i32> %2 to <2 x i64>
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ret <2 x i64> %3
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}
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declare <2 x i64> @llvm.x86.sse41.pmovzxdq(<4 x i32>) nounwind readnone
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define <4 x i32> @stack_fold_pmovzxwd(<8 x i16> %a0) {
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;CHECK-LABEL: stack_fold_pmovzxwd
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;CHECK: pmovzxwd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16> %a0)
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ret <4 x i32> %2
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%2 = shufflevector <8 x i16> %a0, <8 x i16> zeroinitializer, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
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%3 = bitcast <8 x i16> %2 to <4 x i32>
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ret <4 x i32> %3
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}
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declare <4 x i32> @llvm.x86.sse41.pmovzxwd(<8 x i16>) nounwind readnone
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define <2 x i64> @stack_fold_pmovzxwq(<8 x i16> %a0) {
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;CHECK-LABEL: stack_fold_pmovzxwq
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;CHECK: pmovzxwq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
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%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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%2 = call <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16> %a0)
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ret <2 x i64> %2
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%2 = shufflevector <8 x i16> %a0, <8 x i16> zeroinitializer, <8 x i32> <i32 0, i32 8, i32 9, i32 10, i32 1, i32 11, i32 12, i32 13>
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%3 = bitcast <8 x i16> %2 to <2 x i64>
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ret <2 x i64> %3
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}
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declare <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16>) nounwind readnone
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define <2 x i64> @stack_fold_pmuldq(<4 x i32> %a0, <4 x i32> %a1) {
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;CHECK-LABEL: stack_fold_pmuldq
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