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ARM thumb2 parsing of "rsb rd, rn, #0".

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rdar://10549741


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146515 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-12-13 20:50:38 +00:00
parent 0f293de207
commit 55b02f28c1
2 changed files with 12 additions and 2 deletions
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10
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -4727,12 +4727,18 @@ bool ARMAsmParser::ParseInstruction(StringRef Name, SMLoc NameLoc,
}
}
// Similarly, the Thumb1 "RSB" instruction has a literal "#0" on the
// end. Convert it to a token here.
// end. Convert it to a token here. Take care not to convert those
// that should hit the Thumb2 encoding.
if (Mnemonic == "rsb" && isThumb() && Operands.size() == 6 &&
static_cast<ARMOperand*>(Operands[3])->isReg() &&
static_cast<ARMOperand*>(Operands[4])->isReg() &&
static_cast<ARMOperand*>(Operands[5])->isImm()) {
ARMOperand *Op = static_cast<ARMOperand*>(Operands[5]);
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Op->getImm());
if (CE && CE->getValue() == 0) {
if (CE && CE->getValue() == 0 &&
(isThumbOne() ||
(isARMLowRegister(static_cast<ARMOperand*>(Operands[3])->getReg()) &&
isARMLowRegister(static_cast<ARMOperand*>(Operands[4])->getReg())))) {
Operands.erase(Operands.begin() + 5);
Operands.push_back(ARMOperand::CreateToken("#0", Op->getStartLoc()));
delete Op;

4
test/MC/ARM/basic-thumb2-instructions.s
View File

@ -1668,11 +1668,15 @@ _func:
rsbs r3, r12, #0xf
rsb r1, #0xff
rsb r1, r1, #0xff
rsb r11, r11, #0
rsb r9, #0
@ CHECK: rsb.w r2, r5, #1044480 @ encoding: [0xc5,0xf5,0x7f,0x22]
@ CHECK: rsbs.w r3, r12, #15 @ encoding: [0xdc,0xf1,0x0f,0x03]
@ CHECK: rsb.w r1, r1, #255 @ encoding: [0xc1,0xf1,0xff,0x01]
@ CHECK: rsb.w r1, r1, #255 @ encoding: [0xc1,0xf1,0xff,0x01]
@ CHECK: rsb.w r11, r11, #0 @ encoding: [0xcb,0xf1,0x00,0x0b]
@ CHECK: rsb.w r9, r9, #0 @ encoding: [0xc9,0xf1,0x00,0x09]
@------------------------------------------------------------------------------