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Express one of MachineOperand's many constructors in terms of another, by means of default arguments.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11343 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke 2004-02-12 04:15:00 +00:00
parent 17247c64f2
commit 56aa531f93
1 changed files with 1 additions and 7 deletions
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8
include/llvm/CodeGen/MachineInstr.h
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@ -129,13 +129,7 @@ private:
int regNum; // register number for an explicit register
// will be set for a value after reg allocation
private:
MachineOperand()
: immedVal(0),
flags(0),
opType(MO_VirtualRegister),
regNum(-1) {}
MachineOperand(int64_t ImmVal, MachineOperandType OpTy)
MachineOperand(int64_t ImmVal = 0, MachineOperandType OpTy = MO_VirtualRegister)
: immedVal(ImmVal),
flags(0),
opType(OpTy),