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Remove the -disable-kill option. The register allocator is buggy with it,

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and it was only for debugging in the first place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11557 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-02-17 17:49:10 +00:00
parent acce13e4cc
commit 56ddada278
1 changed files with 39 additions and 50 deletions
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89
lib/CodeGen/RegAllocLocal.cpp
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@ -31,9 +31,6 @@ namespace {
Statistic<> NumSpilled ("ra-local", "Number of registers spilled"); Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
Statistic<> NumReloaded("ra-local", "Number of registers reloaded"); Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
Statistic<> NumFused ("ra-local", "Number of reloads fused into instructions"); Statistic<> NumFused ("ra-local", "Number of reloads fused into instructions");
cl::opt<bool> DisableKill("disable-kill", cl::Hidden,
cl::desc("Disable register kill in local-ra"));
class RA : public MachineFunctionPass { class RA : public MachineFunctionPass {
const TargetMachine *TM; const TargetMachine *TM;
MachineFunction *MF; MachineFunction *MF;
@ -122,8 +119,7 @@ namespace {
} }
virtual void getAnalysisUsage(AnalysisUsage &AU) const { virtual void getAnalysisUsage(AnalysisUsage &AU) const {
if (!DisableKill) AU.addRequired<LiveVariables>();
AU.addRequired<LiveVariables>();
AU.addRequiredID(PHIEliminationID); AU.addRequiredID(PHIEliminationID);
AU.addRequiredID(TwoAddressInstructionPassID); AU.addRequiredID(TwoAddressInstructionPassID);
MachineFunctionPass::getAnalysisUsage(AU); MachineFunctionPass::getAnalysisUsage(AU);
@ -263,7 +259,6 @@ void RA::removePhysReg(unsigned PhysReg) {
/// ///
void RA::spillVirtReg(MachineBasicBlock &MBB, MachineInstr *I, void RA::spillVirtReg(MachineBasicBlock &MBB, MachineInstr *I,
unsigned VirtReg, unsigned PhysReg) { unsigned VirtReg, unsigned PhysReg) {
if (!VirtReg && DisableKill) return;
assert(VirtReg && "Spilling a physical register is illegal!" assert(VirtReg && "Spilling a physical register is illegal!"
" Must not have appropriate kill for the register or use exists beyond" " Must not have appropriate kill for the register or use exists beyond"
" the intended one."); " the intended one.");
@ -556,28 +551,26 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg())) MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg()))
MI = reloadVirtReg(MBB, MI, i); MI = reloadVirtReg(MBB, MI, i);
if (!DisableKill) { // If this instruction is the last user of anything in registers, kill the
// If this instruction is the last user of anything in registers, kill the // value, freeing the register being used, so it doesn't need to be
// value, freeing the register being used, so it doesn't need to be // spilled to memory.
// spilled to memory. //
// for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), KE = LV->killed_end(MI); KI != KE; ++KI) {
KE = LV->killed_end(MI); KI != KE; ++KI) { unsigned VirtReg = KI->second;
unsigned VirtReg = KI->second; unsigned PhysReg = VirtReg;
unsigned PhysReg = VirtReg; if (MRegisterInfo::isVirtualRegister(VirtReg)) {
if (MRegisterInfo::isVirtualRegister(VirtReg)) { // If the virtual register was never materialized into a register, it
// If the virtual register was never materialized into a register, it // might not be in the map, but it won't hurt to zero it out anyway.
// might not be in the map, but it won't hurt to zero it out anyway. unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg); PhysReg = PhysRegSlot;
PhysReg = PhysRegSlot; PhysRegSlot = 0;
PhysRegSlot = 0; }
}
if (PhysReg) { if (PhysReg) {
DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg) DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
<< "[%reg" << VirtReg <<"], removing it from live set\n"); << "[%reg" << VirtReg <<"], removing it from live set\n");
removePhysReg(PhysReg); removePhysReg(PhysReg);
}
} }
} }
@ -629,27 +622,25 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
} }
if (!DisableKill) { // If this instruction defines any registers that are immediately dead,
// If this instruction defines any registers that are immediately dead, // kill them now.
// kill them now. //
// for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
for (LiveVariables::killed_iterator KI = LV->dead_begin(MI), KE = LV->dead_end(MI); KI != KE; ++KI) {
KE = LV->dead_end(MI); KI != KE; ++KI) { unsigned VirtReg = KI->second;
unsigned VirtReg = KI->second; unsigned PhysReg = VirtReg;
unsigned PhysReg = VirtReg; if (MRegisterInfo::isVirtualRegister(VirtReg)) {
if (MRegisterInfo::isVirtualRegister(VirtReg)) { unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg); PhysReg = PhysRegSlot;
PhysReg = PhysRegSlot; assert(PhysReg != 0);
assert(PhysReg != 0); PhysRegSlot = 0;
PhysRegSlot = 0; }
}
if (PhysReg) { if (PhysReg) {
DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg) DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
<< " [%reg" << VirtReg << " [%reg" << VirtReg
<< "] is never used, removing it frame live list\n"); << "] is never used, removing it frame live list\n");
removePhysReg(PhysReg); removePhysReg(PhysReg);
}
} }
} }
} }
@ -692,6 +683,7 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) {
MF = &Fn; MF = &Fn;
TM = &Fn.getTarget(); TM = &Fn.getTarget();
RegInfo = TM->getRegisterInfo(); RegInfo = TM->getRegisterInfo();
LV = &getAnalysis<LiveVariables>();
PhysRegsUsed.assign(RegInfo->getNumRegs(), -1); PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
@ -699,9 +691,6 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) {
// mapping for all virtual registers // mapping for all virtual registers
Virt2PhysRegMap.assign(MF->getSSARegMap()->getNumVirtualRegs(), 0); Virt2PhysRegMap.assign(MF->getSSARegMap()->getNumVirtualRegs(), 0);
if (!DisableKill)
LV = &getAnalysis<LiveVariables>();
// Loop over all of the basic blocks, eliminating virtual register references // Loop over all of the basic blocks, eliminating virtual register references
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end(); for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
MBB != MBBe; ++MBB) MBB != MBBe; ++MBB)