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[X86] Add support for combining FMSUB/FNMADD/FNMSUB ISD nodes with an fneg input.
Previously we could only negate the FMADD opcodes. This used to be mostly ok when we lowered FMA intrinsics during lowering. But with the move to llvm.fma from target specific intrinsics, we can combine (fneg (fma)) to (fmsub) earlier. So if we start with (fneg (fma (fneg))) we would get stuck at (fmsub (fneg)). This patch fixes that so we can also combine things like (fmsub (fneg)). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336304 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
@@ -37692,9 +37692,80 @@ static SDValue combineSext(SDNode *N, SelectionDAG &DAG,
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return SDValue();
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}
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static unsigned negateFMAOpcode(unsigned Opcode, bool NegMul, bool NegAcc) {
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if (NegMul) {
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switch (Opcode) {
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default: llvm_unreachable("Unexpected opcode");
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case ISD::FMA: Opcode = X86ISD::FNMADD; break;
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case X86ISD::FMADD_RND: Opcode = X86ISD::FNMADD_RND; break;
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case X86ISD::FMADDS1: Opcode = X86ISD::FNMADDS1; break;
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case X86ISD::FMADDS3: Opcode = X86ISD::FNMADDS3; break;
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case X86ISD::FMADDS1_RND: Opcode = X86ISD::FNMADDS1_RND; break;
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case X86ISD::FMADDS3_RND: Opcode = X86ISD::FNMADDS3_RND; break;
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case X86ISD::FMADD4S: Opcode = X86ISD::FNMADD4S; break;
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case X86ISD::FMSUB: Opcode = X86ISD::FNMSUB; break;
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case X86ISD::FMSUB_RND: Opcode = X86ISD::FNMSUB_RND; break;
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case X86ISD::FMSUBS1: Opcode = X86ISD::FNMSUBS1; break;
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case X86ISD::FMSUBS3: Opcode = X86ISD::FNMSUBS3; break;
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case X86ISD::FMSUBS1_RND: Opcode = X86ISD::FNMSUBS1_RND; break;
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case X86ISD::FMSUBS3_RND: Opcode = X86ISD::FNMSUBS3_RND; break;
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case X86ISD::FMSUB4S: Opcode = X86ISD::FNMSUB4S; break;
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case X86ISD::FNMADD: Opcode = ISD::FMA; break;
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case X86ISD::FNMADD_RND: Opcode = X86ISD::FMADD_RND; break;
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case X86ISD::FNMADDS1: Opcode = X86ISD::FMADDS1; break;
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case X86ISD::FNMADDS3: Opcode = X86ISD::FMADDS3; break;
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case X86ISD::FNMADDS1_RND: Opcode = X86ISD::FMADDS1_RND; break;
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case X86ISD::FNMADDS3_RND: Opcode = X86ISD::FMADDS3_RND; break;
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case X86ISD::FNMADD4S: Opcode = X86ISD::FMADD4S; break;
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case X86ISD::FNMSUB: Opcode = X86ISD::FMSUB; break;
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case X86ISD::FNMSUB_RND: Opcode = X86ISD::FMSUB_RND; break;
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case X86ISD::FNMSUBS1: Opcode = X86ISD::FMSUBS1; break;
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case X86ISD::FNMSUBS3: Opcode = X86ISD::FMSUBS3; break;
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case X86ISD::FNMSUBS1_RND: Opcode = X86ISD::FMSUBS1_RND; break;
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case X86ISD::FNMSUBS3_RND: Opcode = X86ISD::FMSUBS3_RND; break;
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case X86ISD::FNMSUB4S: Opcode = X86ISD::FMSUB4S; break;
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}
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}
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if (NegAcc) {
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switch (Opcode) {
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default: llvm_unreachable("Unexpected opcode");
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case ISD::FMA: Opcode = X86ISD::FMSUB; break;
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case X86ISD::FMADD_RND: Opcode = X86ISD::FMSUB_RND; break;
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case X86ISD::FMADDS1: Opcode = X86ISD::FMSUBS1; break;
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case X86ISD::FMADDS3: Opcode = X86ISD::FMSUBS3; break;
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case X86ISD::FMADDS1_RND: Opcode = X86ISD::FMSUBS1_RND; break;
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case X86ISD::FMADDS3_RND: Opcode = X86ISD::FMSUBS3_RND; break;
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case X86ISD::FMADD4S: Opcode = X86ISD::FMSUB4S; break;
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case X86ISD::FMSUB: Opcode = ISD::FMA; break;
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case X86ISD::FMSUB_RND: Opcode = X86ISD::FMADD_RND; break;
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case X86ISD::FMSUBS1: Opcode = X86ISD::FMADDS1; break;
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case X86ISD::FMSUBS3: Opcode = X86ISD::FMADDS3; break;
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case X86ISD::FMSUBS1_RND: Opcode = X86ISD::FMADDS1_RND; break;
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case X86ISD::FMSUBS3_RND: Opcode = X86ISD::FMADDS3_RND; break;
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case X86ISD::FMSUB4S: Opcode = X86ISD::FMADD4S; break;
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case X86ISD::FNMADD: Opcode = X86ISD::FNMSUB; break;
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case X86ISD::FNMADD_RND: Opcode = X86ISD::FNMSUB_RND; break;
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case X86ISD::FNMADDS1: Opcode = X86ISD::FNMSUBS1; break;
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case X86ISD::FNMADDS3: Opcode = X86ISD::FNMSUBS3; break;
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case X86ISD::FNMADDS1_RND: Opcode = X86ISD::FNMSUBS1_RND; break;
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case X86ISD::FNMADDS3_RND: Opcode = X86ISD::FNMSUBS3_RND; break;
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case X86ISD::FNMADD4S: Opcode = X86ISD::FNMSUB4S; break;
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case X86ISD::FNMSUB: Opcode = X86ISD::FNMADD; break;
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case X86ISD::FNMSUB_RND: Opcode = X86ISD::FNMADD_RND; break;
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case X86ISD::FNMSUBS1: Opcode = X86ISD::FNMADDS1; break;
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case X86ISD::FNMSUBS3: Opcode = X86ISD::FNMADDS3; break;
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case X86ISD::FNMSUBS1_RND: Opcode = X86ISD::FNMADDS1_RND; break;
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case X86ISD::FNMSUBS3_RND: Opcode = X86ISD::FNMADDS3_RND; break;
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case X86ISD::FNMSUB4S: Opcode = X86ISD::FNMADD4S; break;
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}
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}
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return Opcode;
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}
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static SDValue combineFMA(SDNode *N, SelectionDAG &DAG,
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const X86Subtarget &Subtarget) {
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// TODO: Handle FMSUB/FNMADD/FNMSUB as the starting opcode.
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SDLoc dl(N);
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EVT VT = N->getValueType(0);
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@@ -37718,88 +37789,37 @@ static SDValue combineFMA(SDNode *N, SelectionDAG &DAG,
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return false;
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};
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bool IsScalarS1 = N->getOpcode() == X86ISD::FMADDS1 ||
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N->getOpcode() == X86ISD::FMSUBS1 ||
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N->getOpcode() == X86ISD::FNMADDS1 ||
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N->getOpcode() == X86ISD::FNMSUBS1 ||
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N->getOpcode() == X86ISD::FMADDS1_RND ||
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N->getOpcode() == X86ISD::FMSUBS1_RND ||
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N->getOpcode() == X86ISD::FNMADDS1_RND ||
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N->getOpcode() == X86ISD::FNMSUBS1_RND;
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bool IsScalarS3 = N->getOpcode() == X86ISD::FMADDS3 ||
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N->getOpcode() == X86ISD::FMSUBS3 ||
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N->getOpcode() == X86ISD::FNMADDS3 ||
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N->getOpcode() == X86ISD::FNMSUBS3 ||
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N->getOpcode() == X86ISD::FMADDS3_RND ||
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N->getOpcode() == X86ISD::FMSUBS3_RND ||
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N->getOpcode() == X86ISD::FNMADDS3_RND ||
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N->getOpcode() == X86ISD::FNMSUBS3_RND;
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// Do not convert the passthru input of scalar intrinsics.
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// FIXME: We could allow negations of the lower element only.
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bool NegA = N->getOpcode() != X86ISD::FMADDS1 &&
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N->getOpcode() != X86ISD::FMADDS1_RND && invertIfNegative(A);
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bool NegA = !IsScalarS1 && invertIfNegative(A);
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bool NegB = invertIfNegative(B);
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bool NegC = N->getOpcode() != X86ISD::FMADDS3 &&
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N->getOpcode() != X86ISD::FMADDS3_RND && invertIfNegative(C);
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bool NegC = !IsScalarS3 && invertIfNegative(C);
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// Negative multiplication when NegA xor NegB
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bool NegMul = (NegA != NegB);
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bool HasNeg = NegA || NegB || NegC;
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unsigned NewOpcode;
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if (!NegMul)
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NewOpcode = (!NegC) ? unsigned(ISD::FMA) : unsigned(X86ISD::FMSUB);
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else
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NewOpcode = (!NegC) ? X86ISD::FNMADD : X86ISD::FNMSUB;
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// For FMA, we risk reconstructing the node we started with.
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// In order to avoid this, we check for negation or opcode change. If
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// one of the two happened, then it is a new node and we return it.
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if (N->getOpcode() == ISD::FMA) {
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if (HasNeg || NewOpcode != N->getOpcode())
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return DAG.getNode(NewOpcode, dl, VT, A, B, C);
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if (!NegA && !NegB && !NegC)
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return SDValue();
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}
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if (N->getOpcode() == X86ISD::FMADD_RND) {
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switch (NewOpcode) {
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case ISD::FMA: NewOpcode = X86ISD::FMADD_RND; break;
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case X86ISD::FMSUB: NewOpcode = X86ISD::FMSUB_RND; break;
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case X86ISD::FNMADD: NewOpcode = X86ISD::FNMADD_RND; break;
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case X86ISD::FNMSUB: NewOpcode = X86ISD::FNMSUB_RND; break;
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}
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} else if (N->getOpcode() == X86ISD::FMADDS1) {
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switch (NewOpcode) {
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case ISD::FMA: NewOpcode = X86ISD::FMADDS1; break;
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case X86ISD::FMSUB: NewOpcode = X86ISD::FMSUBS1; break;
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case X86ISD::FNMADD: NewOpcode = X86ISD::FNMADDS1; break;
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case X86ISD::FNMSUB: NewOpcode = X86ISD::FNMSUBS1; break;
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}
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} else if (N->getOpcode() == X86ISD::FMADDS3) {
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switch (NewOpcode) {
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case ISD::FMA: NewOpcode = X86ISD::FMADDS3; break;
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case X86ISD::FMSUB: NewOpcode = X86ISD::FMSUBS3; break;
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case X86ISD::FNMADD: NewOpcode = X86ISD::FNMADDS3; break;
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case X86ISD::FNMSUB: NewOpcode = X86ISD::FNMSUBS3; break;
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}
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} else if (N->getOpcode() == X86ISD::FMADDS1_RND) {
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switch (NewOpcode) {
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case ISD::FMA: NewOpcode = X86ISD::FMADDS1_RND; break;
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case X86ISD::FMSUB: NewOpcode = X86ISD::FMSUBS1_RND; break;
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case X86ISD::FNMADD: NewOpcode = X86ISD::FNMADDS1_RND; break;
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case X86ISD::FNMSUB: NewOpcode = X86ISD::FNMSUBS1_RND; break;
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}
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} else if (N->getOpcode() == X86ISD::FMADDS3_RND) {
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switch (NewOpcode) {
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case ISD::FMA: NewOpcode = X86ISD::FMADDS3_RND; break;
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case X86ISD::FMSUB: NewOpcode = X86ISD::FMSUBS3_RND; break;
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case X86ISD::FNMADD: NewOpcode = X86ISD::FNMADDS3_RND; break;
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case X86ISD::FNMSUB: NewOpcode = X86ISD::FNMSUBS3_RND; break;
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}
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} else if (N->getOpcode() == X86ISD::FMADD4S) {
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switch (NewOpcode) {
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case ISD::FMA: NewOpcode = X86ISD::FMADD4S; break;
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case X86ISD::FMSUB: NewOpcode = X86ISD::FMSUB4S; break;
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case X86ISD::FNMADD: NewOpcode = X86ISD::FNMADD4S; break;
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case X86ISD::FNMSUB: NewOpcode = X86ISD::FNMSUB4S; break;
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}
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} else {
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llvm_unreachable("Unexpected opcode!");
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}
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unsigned NewOpcode = negateFMAOpcode(N->getOpcode(), NegA != NegB, NegC);
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// Only return the node is the opcode was changed or one of the
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// operand was negated. If not, we'll just recreate the same node.
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if (HasNeg || NewOpcode != N->getOpcode()) {
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if (N->getNumOperands() == 4)
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return DAG.getNode(NewOpcode, dl, VT, A, B, C, N->getOperand(3));
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return DAG.getNode(NewOpcode, dl, VT, A, B, C);
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}
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return SDValue();
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if (N->getNumOperands() == 4)
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return DAG.getNode(NewOpcode, dl, VT, A, B, C, N->getOperand(3));
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return DAG.getNode(NewOpcode, dl, VT, A, B, C);
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}
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// Combine FMADDSUB(A, B, FNEG(C)) -> FMSUBADD(A, B, C)
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@@ -39420,7 +39440,28 @@ SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
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case X86ISD::FMADDS1:
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case X86ISD::FMADDS3:
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case X86ISD::FMADD4S:
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case ISD::FMA: return combineFMA(N, DAG, Subtarget);
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case X86ISD::FMSUB:
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case X86ISD::FMSUB_RND:
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case X86ISD::FMSUBS1_RND:
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case X86ISD::FMSUBS3_RND:
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case X86ISD::FMSUBS1:
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case X86ISD::FMSUBS3:
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case X86ISD::FMSUB4S:
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case X86ISD::FNMADD:
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case X86ISD::FNMADD_RND:
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case X86ISD::FNMADDS1_RND:
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case X86ISD::FNMADDS3_RND:
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case X86ISD::FNMADDS1:
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case X86ISD::FNMADDS3:
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case X86ISD::FNMADD4S:
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case X86ISD::FNMSUB:
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case X86ISD::FNMSUB_RND:
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case X86ISD::FNMSUBS1_RND:
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case X86ISD::FNMSUBS3_RND:
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case X86ISD::FNMSUBS1:
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case X86ISD::FNMSUBS3:
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case X86ISD::FNMSUB4S:
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case ISD::FMA: return combineFMA(N, DAG, Subtarget);
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case X86ISD::FMADDSUB_RND:
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case X86ISD::FMSUBADD_RND:
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case X86ISD::FMADDSUB:
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@@ -65,16 +65,12 @@ declare <4 x float> @llvm.x86.fma.vfnmadd.ss(<4 x float> %a, <4 x float> %b, <4
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define <8 x float> @test4(<8 x float> %a, <8 x float> %b, <8 x float> %c) {
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; X32-LABEL: test4:
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; X32: # %bb.0: # %entry
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; X32-NEXT: vbroadcastss {{.*#+}} ymm3 = [-0,-0,-0,-0,-0,-0,-0,-0]
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; X32-NEXT: vxorps %ymm3, %ymm2, %ymm2
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; X32-NEXT: vfnmsub213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) - ymm2
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; X32-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2
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; X32-NEXT: retl
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;
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; X64-LABEL: test4:
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; X64: # %bb.0: # %entry
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; X64-NEXT: vbroadcastss {{.*#+}} ymm3 = [-0,-0,-0,-0,-0,-0,-0,-0]
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; X64-NEXT: vxorps %ymm3, %ymm2, %ymm2
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; X64-NEXT: vfnmsub213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) - ymm2
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; X64-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2
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; X64-NEXT: retq
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entry:
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%0 = tail call <8 x float> @llvm.x86.fma.vfmsub.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %c) #2
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@@ -2507,25 +2507,17 @@ define <4 x float> @test_mm_mask3_fnmsub_round_ss(<4 x float> %__W, <4 x float>
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; X86-LABEL: test_mm_mask3_fnmsub_round_ss:
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; X86: ## %bb.0: ## %entry
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; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
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; X86-NEXT: vbroadcastss {{.*#+}} xmm3 = [-0,-0,-0,-0]
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; X86-NEXT: ## encoding: [0xc4,0xe2,0x79,0x18,0x1d,A,A,A,A]
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; X86-NEXT: ## fixup A - offset: 5, value: LCPI119_0, kind: FK_Data_4
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; X86-NEXT: vxorps %xmm3, %xmm1, %xmm1 ## encoding: [0xc5,0xf0,0x57,0xcb]
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; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
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; X86-NEXT: vfmsub231ss %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbb,0xd1]
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; X86-NEXT: ## xmm2 = (xmm0 * xmm1) - xmm2
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; X86-NEXT: vfnmsub231ss %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbf,0xd1]
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; X86-NEXT: ## xmm2 = -(xmm0 * xmm1) - xmm2
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; X86-NEXT: vmovaps %xmm2, %xmm0 ## encoding: [0xc5,0xf8,0x28,0xc2]
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; X86-NEXT: retl ## encoding: [0xc3]
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;
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; X64-LABEL: test_mm_mask3_fnmsub_round_ss:
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; X64: ## %bb.0: ## %entry
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; X64-NEXT: vbroadcastss {{.*#+}} xmm3 = [-0,-0,-0,-0]
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; X64-NEXT: ## encoding: [0xc4,0xe2,0x79,0x18,0x1d,A,A,A,A]
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; X64-NEXT: ## fixup A - offset: 5, value: LCPI119_0-4, kind: reloc_riprel_4byte
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; X64-NEXT: vxorps %xmm3, %xmm1, %xmm1 ## encoding: [0xc5,0xf0,0x57,0xcb]
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; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
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; X64-NEXT: vfmsub231ss %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbb,0xd1]
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; X64-NEXT: ## xmm2 = (xmm0 * xmm1) - xmm2
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; X64-NEXT: vfnmsub231ss %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbf,0xd1]
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; X64-NEXT: ## xmm2 = -(xmm0 * xmm1) - xmm2
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; X64-NEXT: vmovaps %xmm2, %xmm0 ## encoding: [0xc5,0xf8,0x28,0xc2]
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; X64-NEXT: retq ## encoding: [0xc3]
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entry:
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@@ -3133,21 +3125,17 @@ define <2 x double> @test_mm_mask3_fnmsub_round_sd(<2 x double> %__W, <2 x doubl
|
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; X86-LABEL: test_mm_mask3_fnmsub_round_sd:
|
||||
; X86: ## %bb.0: ## %entry
|
||||
; X86-NEXT: movb {{[0-9]+}}(%esp), %al ## encoding: [0x8a,0x44,0x24,0x04]
|
||||
; X86-NEXT: vxorpd LCPI143_0, %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0x57,0x0d,A,A,A,A]
|
||||
; X86-NEXT: ## fixup A - offset: 4, value: LCPI143_0, kind: FK_Data_4
|
||||
; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
|
||||
; X86-NEXT: vfmsub231sd %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbb,0xd1]
|
||||
; X86-NEXT: ## xmm2 = (xmm0 * xmm1) - xmm2
|
||||
; X86-NEXT: vfnmsub231sd %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbf,0xd1]
|
||||
; X86-NEXT: ## xmm2 = -(xmm0 * xmm1) - xmm2
|
||||
; X86-NEXT: vmovapd %xmm2, %xmm0 ## encoding: [0xc5,0xf9,0x28,0xc2]
|
||||
; X86-NEXT: retl ## encoding: [0xc3]
|
||||
;
|
||||
; X64-LABEL: test_mm_mask3_fnmsub_round_sd:
|
||||
; X64: ## %bb.0: ## %entry
|
||||
; X64-NEXT: vxorpd {{.*}}(%rip), %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0x57,0x0d,A,A,A,A]
|
||||
; X64-NEXT: ## fixup A - offset: 4, value: LCPI143_0-4, kind: reloc_riprel_4byte
|
||||
; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
|
||||
; X64-NEXT: vfmsub231sd %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbb,0xd1]
|
||||
; X64-NEXT: ## xmm2 = (xmm0 * xmm1) - xmm2
|
||||
; X64-NEXT: vfnmsub231sd %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbf,0xd1]
|
||||
; X64-NEXT: ## xmm2 = -(xmm0 * xmm1) - xmm2
|
||||
; X64-NEXT: vmovapd %xmm2, %xmm0 ## encoding: [0xc5,0xf9,0x28,0xc2]
|
||||
; X64-NEXT: retq ## encoding: [0xc3]
|
||||
entry:
|
||||
|
||||
@@ -78,18 +78,10 @@ entry:
|
||||
|
||||
|
||||
define <8 x float> @test7(<8 x float> %a, <8 x float> %b, <8 x float> %c) {
|
||||
; SKX-LABEL: test7:
|
||||
; SKX: # %bb.0: # %entry
|
||||
; SKX-NEXT: vxorps {{.*}}(%rip){1to8}, %ymm2, %ymm2
|
||||
; SKX-NEXT: vfnmsub213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) - ymm2
|
||||
; SKX-NEXT: retq
|
||||
;
|
||||
; KNL-LABEL: test7:
|
||||
; KNL: # %bb.0: # %entry
|
||||
; KNL-NEXT: vbroadcastss {{.*#+}} ymm3 = [-0,-0,-0,-0,-0,-0,-0,-0]
|
||||
; KNL-NEXT: vxorps %ymm3, %ymm2, %ymm2
|
||||
; KNL-NEXT: vfnmsub213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) - ymm2
|
||||
; KNL-NEXT: retq
|
||||
; CHECK-LABEL: test7:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: vfnmadd213ps {{.*#+}} ymm0 = -(ymm1 * ymm0) + ymm2
|
||||
; CHECK-NEXT: retq
|
||||
entry:
|
||||
%0 = tail call <8 x float> @llvm.x86.fma.vfmsub.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %c) #2
|
||||
%sub.i = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %0
|
||||
|
||||
Reference in New Issue
Block a user