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Initial implementation of FP->INT and INT->FP casts
Also, fix zero_extend from bool to i8, which fixes Shootout/objinst. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19414 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -14,7 +14,9 @@
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#include "X86.h"
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#include "X86InstrBuilder.h"
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#include "X86RegisterInfo.h"
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#include "llvm/Constants.h" // FIXME: REMOVE
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#include "llvm/Function.h"
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#include "llvm/CodeGen/MachineConstantPool.h" // FIXME: REMOVE
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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@ -657,9 +659,9 @@ unsigned ISel::SelectExpr(SDOperand N) {
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SDNode *Node = N.Val;
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if (N.getOpcode() == ISD::CopyFromReg)
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if (Node->getOpcode() == ISD::CopyFromReg)
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// Just use the specified register as our input.
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return dyn_cast<CopyRegSDNode>(N)->getReg();
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return dyn_cast<CopyRegSDNode>(Node)->getReg();
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// If there are multiple uses of this expression, memorize the
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// register it is code generated in, instead of emitting it multiple
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@ -747,11 +749,18 @@ unsigned ISel::SelectExpr(SDOperand N) {
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case ISD::ZERO_EXTEND: {
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int DestIs16 = N.getValueType() == MVT::i16;
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int SrcIs16 = N.getOperand(0).getValueType() == MVT::i16;
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Tmp1 = SelectExpr(N.getOperand(0));
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// FIXME: This hack is here for zero extension casts from bool to i8. This
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// would not be needed if bools were promoted by Legalize.
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if (N.getValueType() == MVT::i8) {
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BuildMI(BB, X86::MOV8rr, 1, Result).addReg(Tmp1);
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return Result;
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}
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static const unsigned Opc[3] = {
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X86::MOVZX32rr8, X86::MOVZX32rr16, X86::MOVZX16rr8
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};
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Tmp1 = SelectExpr(N.getOperand(0));
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BuildMI(BB, Opc[SrcIs16+DestIs16*2], 1, Result).addReg(Tmp1);
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return Result;
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}
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@ -759,6 +768,10 @@ unsigned ISel::SelectExpr(SDOperand N) {
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int DestIs16 = N.getValueType() == MVT::i16;
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int SrcIs16 = N.getOperand(0).getValueType() == MVT::i16;
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// FIXME: Legalize should promote bools to i8!
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assert(N.getOperand(0).getValueType() != MVT::i1 &&
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"Sign extend from bool not implemented!");
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static const unsigned Opc[3] = {
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X86::MOVSX32rr8, X86::MOVSX32rr16, X86::MOVSX16rr8
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};
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@ -792,6 +805,7 @@ unsigned ISel::SelectExpr(SDOperand N) {
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// then reading it back into a register.
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// Create as stack slot to use.
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// FIXME: This should automatically be made by the Legalizer!
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Tmp1 = TLI.getTargetData().getFloatAlignment();
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Tmp2 = BB->getParent()->getFrameInfo()->CreateStackObject(4, Tmp1);
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@ -803,6 +817,209 @@ unsigned ISel::SelectExpr(SDOperand N) {
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addFrameReference(BuildMI(BB, X86::FLD32m, 5, Result), Tmp2);
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ContainsFPCode = true;
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return Result;
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case ISD::SINT_TO_FP:
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case ISD::UINT_TO_FP: {
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// FIXME: Most of this grunt work should be done by legalize!
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// Promote the integer to a type supported by FLD. We do this because there
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// are no unsigned FLD instructions, so we must promote an unsigned value to
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// a larger signed value, then use FLD on the larger value.
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//
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MVT::ValueType PromoteType = MVT::Other;
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MVT::ValueType SrcTy = N.getOperand(0).getValueType();
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unsigned PromoteOpcode = 0;
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unsigned RealDestReg = Result;
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switch (SrcTy) {
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case MVT::i1:
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case MVT::i8:
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// We don't have the facilities for directly loading byte sized data from
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// memory (even signed). Promote it to 16 bits.
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PromoteType = MVT::i16;
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PromoteOpcode = Node->getOpcode() == ISD::SINT_TO_FP ?
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X86::MOVSX16rr8 : X86::MOVZX16rr8;
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break;
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case MVT::i16:
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if (Node->getOpcode() == ISD::UINT_TO_FP) {
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PromoteType = MVT::i32;
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PromoteOpcode = X86::MOVZX32rr16;
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}
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break;
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default:
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// Don't fild into the real destination.
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if (Node->getOpcode() == ISD::UINT_TO_FP)
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Result = MakeReg(Node->getValueType(0));
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break;
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}
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Tmp1 = SelectExpr(N.getOperand(0)); // Get the operand register
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if (PromoteType != MVT::Other) {
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Tmp2 = MakeReg(PromoteType);
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BuildMI(BB, PromoteOpcode, 1, Tmp2).addReg(Tmp1);
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SrcTy = PromoteType;
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Tmp1 = Tmp2;
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}
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// Spill the integer to memory and reload it from there.
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unsigned Size = MVT::getSizeInBits(SrcTy)/8;
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MachineFunction *F = BB->getParent();
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int FrameIdx = F->getFrameInfo()->CreateStackObject(Size, Size);
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switch (SrcTy) {
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case MVT::i64:
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// FIXME: this won't work for cast [u]long to FP
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addFrameReference(BuildMI(BB, X86::MOV32mr, 5),
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FrameIdx).addReg(Tmp1);
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addFrameReference(BuildMI(BB, X86::MOV32mr, 5),
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FrameIdx, 4).addReg(Tmp1+1);
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addFrameReference(BuildMI(BB, X86::FILD64m, 5, Result), FrameIdx);
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break;
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case MVT::i32:
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addFrameReference(BuildMI(BB, X86::MOV32mr, 5),
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FrameIdx).addReg(Tmp1);
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addFrameReference(BuildMI(BB, X86::FILD32m, 5, Result), FrameIdx);
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break;
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case MVT::i16:
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addFrameReference(BuildMI(BB, X86::MOV16mr, 5),
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FrameIdx).addReg(Tmp1);
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addFrameReference(BuildMI(BB, X86::FILD16m, 5, Result), FrameIdx);
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break;
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default: break; // No promotion required.
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}
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if (Node->getOpcode() == ISD::UINT_TO_FP && SrcTy == MVT::i32) {
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// If this is a cast from uint -> double, we need to be careful when if
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// the "sign" bit is set. If so, we don't want to make a negative number,
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// we want to make a positive number. Emit code to add an offset if the
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// sign bit is set.
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// Compute whether the sign bit is set by shifting the reg right 31 bits.
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unsigned IsNeg = MakeReg(MVT::i32);
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BuildMI(BB, X86::SHR32ri, 2, IsNeg).addReg(Tmp1).addImm(31);
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// Create a CP value that has the offset in one word and 0 in the other.
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static ConstantInt *TheOffset = ConstantUInt::get(Type::ULongTy,
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0x4f80000000000000ULL);
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unsigned CPI = F->getConstantPool()->getConstantPoolIndex(TheOffset);
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BuildMI(BB, X86::FADD32m, 5, RealDestReg).addReg(Result)
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.addConstantPoolIndex(CPI).addZImm(4).addReg(IsNeg).addSImm(0);
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} else if (Node->getOpcode() == ISD::UINT_TO_FP && SrcTy == MVT::i64) {
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// We need special handling for unsigned 64-bit integer sources. If the
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// input number has the "sign bit" set, then we loaded it incorrectly as a
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// negative 64-bit number. In this case, add an offset value.
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// Emit a test instruction to see if the dynamic input value was signed.
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BuildMI(BB, X86::TEST32rr, 2).addReg(Tmp1+1).addReg(Tmp1+1);
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// If the sign bit is set, get a pointer to an offset, otherwise get a
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// pointer to a zero.
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MachineConstantPool *CP = F->getConstantPool();
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unsigned Zero = MakeReg(MVT::i32);
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Constant *Null = Constant::getNullValue(Type::UIntTy);
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addConstantPoolReference(BuildMI(BB, X86::LEA32r, 5, Zero),
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CP->getConstantPoolIndex(Null));
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unsigned Offset = MakeReg(MVT::i32);
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Constant *OffsetCst = ConstantUInt::get(Type::UIntTy, 0x5f800000);
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addConstantPoolReference(BuildMI(BB, X86::LEA32r, 5, Offset),
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CP->getConstantPoolIndex(OffsetCst));
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unsigned Addr = MakeReg(MVT::i32);
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BuildMI(BB, X86::CMOVS32rr, 2, Addr).addReg(Zero).addReg(Offset);
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// Load the constant for an add. FIXME: this could make an 'fadd' that
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// reads directly from memory, but we don't support these yet.
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unsigned ConstReg = MakeReg(MVT::f64);
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addDirectMem(BuildMI(BB, X86::FLD32m, 4, ConstReg), Addr);
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BuildMI(BB, X86::FpADD, 2, RealDestReg).addReg(ConstReg).addReg(Result);
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}
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return RealDestReg;
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}
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case ISD::FP_TO_SINT:
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case ISD::FP_TO_UINT: {
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// FIXME: Most of this grunt work should be done by legalize!
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Tmp1 = SelectExpr(N.getOperand(0)); // Get the operand register
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// Change the floating point control register to use "round towards zero"
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// mode when truncating to an integer value.
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//
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MachineFunction *F = BB->getParent();
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int CWFrameIdx = F->getFrameInfo()->CreateStackObject(2, 2);
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addFrameReference(BuildMI(BB, X86::FNSTCW16m, 4), CWFrameIdx);
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// Load the old value of the high byte of the control word...
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unsigned HighPartOfCW = MakeReg(MVT::i8);
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addFrameReference(BuildMI(BB, X86::MOV8rm, 4, HighPartOfCW),
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CWFrameIdx, 1);
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// Set the high part to be round to zero...
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addFrameReference(BuildMI(BB, X86::MOV8mi, 5),
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CWFrameIdx, 1).addImm(12);
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// Reload the modified control word now...
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addFrameReference(BuildMI(BB, X86::FLDCW16m, 4), CWFrameIdx);
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// Restore the memory image of control word to original value
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addFrameReference(BuildMI(BB, X86::MOV8mr, 5),
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CWFrameIdx, 1).addReg(HighPartOfCW);
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// We don't have the facilities for directly storing byte sized data to
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// memory. Promote it to 16 bits. We also must promote unsigned values to
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// larger classes because we only have signed FP stores.
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MVT::ValueType StoreClass = Node->getValueType(0);
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if (StoreClass == MVT::i8 || Node->getOpcode() == ISD::FP_TO_UINT)
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switch (StoreClass) {
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case MVT::i8: StoreClass = MVT::i16; break;
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case MVT::i16: StoreClass = MVT::i32; break;
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case MVT::i32: StoreClass = MVT::i64; break;
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// The following treatment of cLong may not be perfectly right,
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// but it survives chains of casts of the form
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// double->ulong->double.
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case MVT::i64: StoreClass = MVT::i64; break;
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default: assert(0 && "Unknown store class!");
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}
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// Spill the integer to memory and reload it from there.
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unsigned Size = MVT::getSizeInBits(StoreClass)/8;
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int FrameIdx = F->getFrameInfo()->CreateStackObject(Size, Size);
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switch (StoreClass) {
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default: assert(0 && "Unknown store class!");
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case MVT::i16:
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addFrameReference(BuildMI(BB, X86::FIST16m, 5), FrameIdx).addReg(Tmp1);
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break;
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case MVT::i32:
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addFrameReference(BuildMI(BB, X86::FIST16m, 5), FrameIdx).addReg(Tmp1);
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break;
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case MVT::i64:
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addFrameReference(BuildMI(BB, X86::FIST16m, 5), FrameIdx).addReg(Tmp1);
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break;
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}
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switch (Node->getValueType(0)) {
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default:
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assert(0 && "Unknown integer type!");
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case MVT::i64:
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// FIXME: this isn't gunna work.
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addFrameReference(BuildMI(BB, X86::MOV32rm, 4, Result), FrameIdx);
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addFrameReference(BuildMI(BB, X86::MOV32rm, 4, Result+1), FrameIdx, 4);
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case MVT::i32:
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addFrameReference(BuildMI(BB, X86::MOV32rm, 4, Result), FrameIdx);
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break;
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case MVT::i16:
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addFrameReference(BuildMI(BB, X86::MOV16rm, 4, Result), FrameIdx);
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break;
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case MVT::i8:
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addFrameReference(BuildMI(BB, X86::MOV8rm, 4, Result), FrameIdx);
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break;
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}
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// Reload the original control word now.
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addFrameReference(BuildMI(BB, X86::FLDCW16m, 4), CWFrameIdx);
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return Result;
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}
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case ISD::ADD:
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// See if we can codegen this as an LEA to fold operations together.
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if (N.getValueType() == MVT::i32) {
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