Non-fast-isel followup to 129634; correctly handle branches controlled

by non-CMP expressions.  The executable test case (129821) would test
this as well, if we had an "-O0 -disable-arm-fast-isel" LLVM-GCC
tester.  Alas, the ARM assembly would be very difficult to check with
FileCheck.

The thumb2-cbnz.ll test is affected; it generates larger code (tst.w
vs. cmp #0), but I believe the new version is correct.
rdar://problem/9298790


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131261 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Stuart Hastings 2011-05-12 23:36:41 +00:00
parent 6175e03825
commit 5adc646380
2 changed files with 13 additions and 5 deletions

View File

@ -3535,9 +3535,16 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
Tmp2.getOperand(0), Tmp2.getOperand(1),
Node->getOperand(2));
} else {
// We test only the i1 bit. Skip the AND if UNDEF.
Tmp3 = (Tmp2.getOpcode() == ISD::UNDEF ||
(Tmp2.getOpcode() == ISD::AND &&
Tmp2.getConstantOperandVal(1) == 1)) ?
Tmp2 :
DAG.getNode(ISD::AND, dl, Tmp2.getValueType(), Tmp2,
DAG.getConstant(1, Tmp2.getValueType()));
Tmp1 = DAG.getNode(ISD::BR_CC, dl, MVT::Other, Tmp1,
DAG.getCondCode(ISD::SETNE), Tmp2,
DAG.getConstant(0, Tmp2.getValueType()),
DAG.getCondCode(ISD::SETNE), Tmp3,
DAG.getConstant(0, Tmp3.getValueType()),
Node->getOperand(2));
}
Results.push_back(Tmp1);

View File

@ -20,9 +20,10 @@ bb7: ; preds = %bb3
br i1 %a, label %bb11, label %bb9
bb9: ; preds = %bb7
; CHECK: cmp r0, #0
; CHECK: cmp r0, #0
; CHECK-NEXT: cbnz
; CHECK: tst.w r0, #1
; CHECK: tst.w r0, #1
; CHECK: tst.w r0, #1
; CHECK: bne
%0 = tail call double @floor(double %b) nounwind readnone ; <double> [#uses=0]
br label %bb11