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Teach Legalize how to pack VVECTOR_SHUFFLE nodes into VECTOR_SHUFFLE nodes.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27232 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-03-28 20:24:43 +00:00
parent 354cde9a7e
commit 5b2316e2b0
1 changed files with 21 additions and 0 deletions
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21
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@ -4532,6 +4532,27 @@ SDOperand SelectionDAGLegalize::PackVectorOp(SDOperand Op,
Node->getOperand(1), Node->getOperand(2));
}
break;
case ISD::VVECTOR_SHUFFLE:
if (!MVT::isVector(NewVT)) {
// Returning a scalar? Figure out if it is the LHS or RHS and return it.
SDOperand EltNum = Node->getOperand(2).getOperand(0);
if (cast<ConstantSDNode>(EltNum)->getValue())
Result = PackVectorOp(Node->getOperand(1), NewVT);
else
Result = PackVectorOp(Node->getOperand(0), NewVT);
} else {
// Otherwise, return a VECTOR_SHUFFLE node. First convert the index
// vector from a VBUILD_VECTOR to a BUILD_VECTOR.
std::vector<SDOperand> BuildVecIdx(Node->getOperand(2).Val->op_begin(),
Node->getOperand(2).Val->op_end()-2);
MVT::ValueType BVT = MVT::getIntVectorWithNumElements(BuildVecIdx.size());
SDOperand BV = DAG.getNode(ISD::BUILD_VECTOR, BVT, BuildVecIdx);
Result = DAG.getNode(ISD::VECTOR_SHUFFLE, NewVT,
PackVectorOp(Node->getOperand(0), NewVT),
PackVectorOp(Node->getOperand(1), NewVT), BV);
}
break;
case ISD::VBIT_CONVERT:
if (Op.getOperand(0).getValueType() != MVT::Vector)
Result = DAG.getNode(ISD::BIT_CONVERT, NewVT, Op.getOperand(0));