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Provide vext.{16,32}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79620 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2371,9 +2371,6 @@ static bool isVEXTMask(const SmallVectorImpl<int> &M, EVT VT,
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if (ReverseVEXT)
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Imm -= NumElts;
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// VEXT only handles 8-bit elements so scale the index for larger elements.
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Imm *= VT.getVectorElementType().getSizeInBits() / 8;
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return true;
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}
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@ -1949,16 +1949,29 @@ def VREV16q8 : VREV16Q<0b00, "vrev16.8", v16i8>;
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// VEXT : Vector Extract
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def VEXTd : N3V<0,1,0b11,0b0000,0,0, (outs DPR:$dst),
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(ins DPR:$lhs, DPR:$rhs, i32imm:$index), NoItinerary,
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"vext.8\t$dst, $lhs, $rhs, $index", "",
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[(set DPR:$dst, (v8i8 (NEONvext (v8i8 DPR:$lhs),
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(v8i8 DPR:$rhs), imm:$index)))]>;
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def VEXTq : N3V<0,1,0b11,0b0000,1,0, (outs QPR:$dst),
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(ins QPR:$lhs, QPR:$rhs, i32imm:$index), NoItinerary,
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"vext.8\t$dst, $lhs, $rhs, $index", "",
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[(set QPR:$dst, (v16i8 (NEONvext (v16i8 QPR:$lhs),
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(v16i8 QPR:$rhs), imm:$index)))]>;
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class VEXTd<string OpcodeStr, ValueType Ty>
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: N3V<0,1,0b11,0b0000,0,0, (outs DPR:$dst),
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(ins DPR:$lhs, DPR:$rhs, i32imm:$index), NoItinerary,
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!strconcat(OpcodeStr, "\t$dst, $lhs, $rhs, $index"), "",
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[(set DPR:$dst, (Ty (NEONvext (Ty DPR:$lhs),
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(Ty DPR:$rhs), imm:$index)))]>;
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class VEXTq<string OpcodeStr, ValueType Ty>
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: N3V<0,1,0b11,0b0000,1,0, (outs QPR:$dst),
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(ins QPR:$lhs, QPR:$rhs, i32imm:$index), NoItinerary,
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!strconcat(OpcodeStr, "\t$dst, $lhs, $rhs, $index"), "",
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[(set QPR:$dst, (Ty (NEONvext (Ty QPR:$lhs),
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(Ty QPR:$rhs), imm:$index)))]>;
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def VEXTd8 : VEXTd<"vext.8", v8i8>;
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def VEXTd16 : VEXTd<"vext.16", v4i16>;
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def VEXTd32 : VEXTd<"vext.32", v2i32>;
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def VEXTdf : VEXTd<"vext.32", v2f32>;
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def VEXTq8 : VEXTq<"vext.8", v16i8>;
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def VEXTq16 : VEXTq<"vext.16", v8i16>;
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def VEXTq32 : VEXTq<"vext.32", v4i32>;
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def VEXTqf : VEXTq<"vext.32", v4f32>;
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// VTRN : Vector Transpose
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