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X86ISD::SETCC (e.g. SETEr) produces a flag (so multiple SETCC can be

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linked together).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25247 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-01-12 08:27:59 +00:00
parent 002fe9baf2
commit 5ee4ccce5b
2 changed files with 4 additions and 3 deletions
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4
lib/Target/X86/X86ISelLowering.cpp
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@ -161,8 +161,8 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
if (X86ScalarSSE) {
// Set up the FP register classes.
addRegisterClass(MVT::f32, X86::V4F4RegisterClass);
addRegisterClass(MVT::f64, X86::V2F8RegisterClass);
addRegisterClass(MVT::f32, X86::FR32RegisterClass);
addRegisterClass(MVT::f64, X86::FR64RegisterClass);
// SSE has no load+extend ops
setOperationAction(ISD::EXTLOAD, MVT::f32, Expand);

3
lib/Target/X86/X86InstrInfo.td
View File

@ -74,7 +74,8 @@ def X86cmov : SDNode<"X86ISD::CMOV", SDTX86Cmov,
[SDNPOutFlag]>;
def X86brcond : SDNode<"X86ISD::BRCOND", SDTX86BrCond,
[SDNPHasChain]>;
def X86setcc : SDNode<"X86ISD::SETCC", SDTX86SetCC, []>;
def X86setcc : SDNode<"X86ISD::SETCC", SDTX86SetCC,
[SDNPOutFlag]>;
def X86retflag : SDNode<"X86ISD::RET_FLAG", SDTX86Ret,
[SDNPHasChain, SDNPOptInFlag]>;