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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1495 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -79,6 +79,7 @@ public:
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typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
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// A vector of all machine register classes
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//
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typedef vector<const MachineRegClassInfo *> MachineRegClassArrayType;
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@ -92,6 +93,10 @@ protected:
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public:
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// empty constructor
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//
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MachineRegInfo(const TargetMachine& tgt) : target(tgt) { }
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// According the definition of a MachineOperand class, a Value in a
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// machine instruction can go into either a normal register or a
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@ -111,14 +116,14 @@ public:
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}
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// returns the register that is hardwired to zero if any (-1 if none)
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virtual inline int getZeroRegNum() const = 0;
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//virtual unsigned getRegClassIDOfValue (const Value *const Val) const = 0;
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// this method must give the exact register class of a machine operand
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// e.g, Int, Float, Int CC, Float CC
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//virtual unsigned getRCIDOfMachineOp (const MachineOperand &MO) const = 0;
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//
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virtual inline int getZeroRegNum() const = 0;
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// The following methods are used to color special live ranges (e.g.
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// method args and return values etc.) with specific hardware registers
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// as required. See SparcRegInfo.cpp for the implementation for Sparc.
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//
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virtual void suggestRegs4MethodArgs(const Method *const Meth,
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LiveRangeInfo & LRI) const = 0;
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@ -140,6 +145,11 @@ public:
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// The following methods are used to generate "copy" machine instructions
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// for an architecture. Currently they are used in MachineRegClass
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// interface. However, they can be moved to MachineInstrInfo interface if
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// necessary.
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//
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virtual MachineInstr *
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cpReg2RegMI(const unsigned SrcReg, const unsigned DestReg,
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const int RegType) const=0;
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@ -154,44 +164,65 @@ public:
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virtual MachineInstr *cpValue2Value( Value *Src, Value *Dest) const=0;
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virtual bool isRegVolatile(const int RegClassID, const int Reg) const=0;
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//virtual bool handleSpecialMInstr(const MachineInstr * MInst,
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// LiveRangeInfo& LRI, vector<RegClass *> RCL) const = 0;
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// returns the reg used for pushing the address when a method is called.
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// Returns the reg used for pushing the address when a method is called.
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// This can be used for other purposes between calls
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//
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virtual unsigned getCallAddressReg() const = 0;
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// and when we return from a method. It should be made sure that this
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// Returns the register containing the return address.
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//It should be made sure that this
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// register contains the return value when a return instruction is reached.
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//
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virtual unsigned getReturnAddressReg() const = 0;
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// Each register class has a seperate space for register IDs. To convert
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// a regId in a register class to a common Id, we use the folloing method(s)
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//
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virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0;
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virtual const string getUnifiedRegName(int UnifiedRegNum) const = 0;
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// Gives the type of a register based on the type of the LR
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//
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virtual int getRegType(const LiveRange *const LR) const=0;
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// Gives the return value contained in a CALL machine instruction
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//
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virtual const Value * getCallInstRetVal(const MachineInstr *CallMI) const=0;
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// The following methods are used to get the frame/stack pointers
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//
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inline virtual unsigned getFramePointer() const=0;
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inline virtual unsigned getStackPointer() const=0;
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// A register can be initialized to an invalid number. That number can
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// be obtained using this method.
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//
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inline virtual int getInvalidRegNum() const=0;
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// Method for inserting caller saving code. The caller must save all the
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// volatile registers across a call based on the calling conventions of
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// an architecture. This must insert code for saving and restoring
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// such registers on
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//
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virtual void insertCallerSavingCode(const MachineInstr *MInst,
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const BasicBlock *BB,
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PhyRegAlloc &PRA ) const = 0;
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// This method gives the the number of bytes of stack spaceallocated
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// to a register when it is spilled to the stack.
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//
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virtual inline int getSpilledRegSize(const int RegType) const = 0;
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MachineRegInfo(const TargetMachine& tgt) : target(tgt) { }
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};
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