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AMDGPU/SI: Make sure to emit TargetConstant nodes when matching ds_*permute
Summary: This fixes a bug with ds_*permute instructions where if it was passed a constant address, then the offset operand would get assigned a register operand instead of an immediate. Reviewers: scchan, arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19994 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272349 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -876,7 +876,7 @@ bool AMDGPUDAGToDAGISel::SelectDS1Addr1Offset(SDValue Addr, SDValue &Base,
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Zero, Addr.getOperand(1));
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Base = SDValue(MachineSub, 0);
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Offset = Addr.getOperand(0);
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Offset = CurDAG->getTargetConstant(ByteOffset, DL, MVT::i16);
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return true;
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}
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}
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@ -894,7 +894,7 @@ bool AMDGPUDAGToDAGISel::SelectDS1Addr1Offset(SDValue Addr, SDValue &Base,
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MachineSDNode *MovZero = CurDAG->getMachineNode(AMDGPU::V_MOV_B32_e32,
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DL, MVT::i32, Zero);
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Base = SDValue(MovZero, 0);
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Offset = Addr;
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Offset = CurDAG->getTargetConstant(CAddr->getZExtValue(), DL, MVT::i16);
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return true;
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}
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}
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@ -21,4 +21,13 @@ define void @ds_bpermute_imm_offset(i32 addrspace(1)* %out, i32 %base_index, i32
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ret void
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}
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; CHECK-LABEL: {{^}}ds_bpermute_imm_index:
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; CHECK: ds_bpermute_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:64
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; CHECK: s_waitcnt lgkmcnt
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define void @ds_bpermute_imm_index(i32 addrspace(1)* %out, i32 %base_index, i32 %src) nounwind {
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%bpermute = call i32 @llvm.amdgcn.ds.bpermute(i32 64, i32 %src) #0
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store i32 %bpermute, i32 addrspace(1)* %out, align 4
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ret void
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}
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attributes #0 = { nounwind readnone convergent }
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