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Move load / store multiple before post-alloc scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83236 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -22,10 +22,6 @@
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#include "llvm/Target/TargetRegistry.h"
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using namespace llvm;
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static cl::opt<bool>
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LdStBeforeSched("ldstopti-before-sched2", cl::Hidden,
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cl::desc("Move ld / st multiple pass before postalloc scheduling"));
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static const MCAsmInfo *createMCAsmInfo(const Target &T,
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const StringRef &TT) {
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Triple TheTriple(TT);
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@ -109,8 +105,7 @@ bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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// FIXME: temporarily disabling load / store optimization pass for Thumb1.
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if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
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if (LdStBeforeSched)
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PM.add(createARMLoadStoreOptimizationPass());
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PM.add(createARMLoadStoreOptimizationPass());
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return true;
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}
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@ -118,11 +113,8 @@ bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
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bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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// FIXME: temporarily disabling load / store optimization pass for Thumb1.
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if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only()) {
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if (!LdStBeforeSched)
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PM.add(createARMLoadStoreOptimizationPass());
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if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
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PM.add(createIfConverterPass());
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}
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if (Subtarget.isThumb2()) {
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PM.add(createThumb2ITBlockPass());
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@ -1,4 +1,4 @@
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; RUN: llc < %s -mtriple=arm-apple-darwin9 -stats |& grep asm-printer | grep 159
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; RUN: llc < %s -mtriple=arm-apple-darwin9 -stats |& grep asm-printer | grep 154
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%"struct.Adv5::Ekin<3>" = type <{ i8 }>
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%"struct.Adv5::X::Energyflux<3>" = type { double }
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@ -1,8 +1,5 @@
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; XFAIL: *
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; RUN: llvm-as < %s | llc -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -post-RA-scheduler | FileCheck %s
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; RUN: llvm-as < %s | llc -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s
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; ModuleID = '<stdin>'
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
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target triple = "thumbv7-apple-darwin9"
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@ -1,5 +1,4 @@
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; RUN: llc < %s -march=arm
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; RUN: llc < %s -march=arm | grep blge | count 1
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; RUN: llc < %s -march=arm | FileCheck %s
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@x = external global i32* ; <i32**> [#uses=1]
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@ -11,6 +10,8 @@ entry:
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}
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define void @t1(i32 %a, i32 %b) {
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; CHECK: t1:
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; CHECK: ldmltfd sp!, {r7, pc}
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entry:
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%tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1]
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br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
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