Implement InstCombine/and.ll:test(15|16)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8607 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2003-09-19 19:05:02 +00:00
parent 0daee350cf
commit 62a355cc6e

View File

@ -798,6 +798,33 @@ Instruction *InstCombiner::OptAndOp(Instruction *Op,
}
}
break;
case Instruction::Shl: {
// We know that the AND will not produce any of the bits shifted in, so if
// the anded constant includes them, clear them now!
//
Constant *AllOne = ConstantIntegral::getAllOnesValue(AndRHS->getType());
Constant *CI = *AndRHS & *(*AllOne << *OpRHS);
if (CI != AndRHS) {
TheAnd.setOperand(1, CI);
return &TheAnd;
}
break;
}
case Instruction::Shr:
// We know that the AND will not produce any of the bits shifted in, so if
// the anded constant includes them, clear them now! This only applies to
// unsigned shifts, because a signed shr may bring in set bits!
//
if (AndRHS->getType()->isUnsigned()) {
Constant *AllOne = ConstantIntegral::getAllOnesValue(AndRHS->getType());
Constant *CI = *AndRHS & *(*AllOne >> *OpRHS);
if (CI != AndRHS) {
TheAnd.setOperand(1, CI);
return &TheAnd;
}
}
break;
}
return 0;
}