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Revert "[LSR] Create fewer redundant instructions."

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This reverts commit r263644.  Investigating bootstrap failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263655 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Geoff Berry 2016-03-16 19:21:47 +00:00
parent 60dd24fdc0
commit 6350742547
2 changed files with 20 additions and 56 deletions
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42
lib/Transforms/Scalar/LoopStrengthReduce.cpp
View File

@ -4331,28 +4331,7 @@ BasicBlock::iterator
LSRInstance::HoistInsertPosition(BasicBlock::iterator IP,
const SmallVectorImpl<Instruction *> &Inputs)
const {
Instruction *Tentative = &*IP;
for (;;) {
bool AllDominate = true;
Instruction *BetterPos = nullptr;
for (Instruction *Inst : Inputs) {
if (Inst == Tentative || !DT.dominates(Inst, Tentative)) {
AllDominate = false;
break;
}
// Attempt to find an insert position in the middle of the block,
// instead of at the end, so that it can be used for other expansions.
if (Tentative->getParent() == Inst->getParent() &&
(!BetterPos || !DT.dominates(Inst, BetterPos)))
BetterPos = &*std::next(BasicBlock::iterator(Inst));
}
if (!AllDominate)
break;
if (BetterPos)
IP = BetterPos->getIterator();
else
IP = Tentative->getIterator();
const Loop *IPLoop = LI.getLoopFor(IP->getParent());
unsigned IPLoopDepth = IPLoop ? IPLoop->getLoopDepth() : 0;
@ -4371,7 +4350,26 @@ LSRInstance::HoistInsertPosition(BasicBlock::iterator IP,
break;
}
Tentative = IDom->getTerminator();
bool AllDominate = true;
Instruction *BetterPos = nullptr;
Instruction *Tentative = IDom->getTerminator();
for (Instruction *Inst : Inputs) {
if (Inst == Tentative || !DT.dominates(Inst, Tentative)) {
AllDominate = false;
break;
}
// Attempt to find an insert position in the middle of the block,
// instead of at the end, so that it can be used for other expansions.
if (IDom == Inst->getParent() &&
(!BetterPos || !DT.dominates(Inst, BetterPos)))
BetterPos = &*std::next(BasicBlock::iterator(Inst));
}
if (!AllDominate)
break;
if (BetterPos)
IP = BetterPos->getIterator();
else
IP = Tentative->getIterator();
}
return IP;

34
test/Transforms/LoopStrengthReduce/AArch64/lsr-reuse.ll
View File

@ -1,34 +0,0 @@
; RUN: llc -mtriple=arm64-unknown-unknown -print-lsr-output < %s 2>&1 | FileCheck %s
declare void @foo(i64)
; Verify that redundant adds aren't inserted by LSR.
; CHECK-LABEL: @bar(
define void @bar(double* %A) {
entry:
br label %while.cond
while.cond:
; CHECK-LABEL: while.cond:
; CHECK: add i64 %lsr.iv, 1
; CHECK-NOT: add i64 %lsr.iv, 1
; CHECK-LABEL: land.rhs:
%indvars.iv28 = phi i64 [ %indvars.iv.next29, %land.rhs ], [ 50, %entry ]
%cmp = icmp sgt i64 %indvars.iv28, 0
br i1 %cmp, label %land.rhs, label %while.end
land.rhs:
%indvars.iv.next29 = add nsw i64 %indvars.iv28, -1
%arrayidx = getelementptr inbounds double, double* %A, i64 %indvars.iv.next29
%Aload = load double, double* %arrayidx, align 8
%cmp1 = fcmp oeq double %Aload, 0.000000e+00
br i1 %cmp1, label %while.cond, label %if.end
while.end:
%indvars.iv28.lcssa = phi i64 [ %indvars.iv28, %while.cond ]
tail call void @foo(i64 %indvars.iv28.lcssa)
br label %if.end
if.end:
ret void
}