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R600/SI: Insert more NOPs after READLANE on VI, don't use NOPs on CI

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This is a candidate for stable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233080 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Marek Olsak 2015-03-24 13:40:38 +00:00
parent a2705bbd42
commit 63d8e012ca
1 changed files with 16 additions and 1 deletions
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17
lib/Target/R600/SIRegisterInfo.cpp
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@ -268,7 +268,22 @@ void SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
.addReg(SubReg);
}
}
TII->insertNOPs(MI, 3);
// TODO: only do this when it is needed
switch (MF->getSubtarget<AMDGPUSubtarget>().getGeneration()) {
case AMDGPUSubtarget::SOUTHERN_ISLANDS:
// "VALU writes SGPR" -> "SMRD reads that SGPR" needs "S_NOP 3" on SI
TII->insertNOPs(MI, 3);
break;
case AMDGPUSubtarget::SEA_ISLANDS:
break;
default: // VOLCANIC_ISLANDS and later
// "VALU writes SGPR -> VMEM reads that SGPR" needs "S_NOP 4" on VI
// and later. This also applies to VALUs which write VCC, but we're
// unlikely to see VMEM use VCC.
TII->insertNOPs(MI, 4);
}
MI->eraseFromParent();
break;
}