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Start static relocation implementation for mips16.

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This checkin makes hello world work. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174264 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reed Kotler 2013-02-02 04:07:35 +00:00
parent a0bbe40380
commit 63f3312355
3 changed files with 37 additions and 1 deletions
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27
lib/Target/Mips/Mips16InstrInfo.td
View File

@ -44,6 +44,15 @@ class FEXT_CCRXI16_ins<bits<5> _op, string asmstr,
let isCodeGenOnly=1;
}
// JAL and JALX instruction format
//
class FJAL16_ins<bits<1> _X, string asmstr,
InstrItinClass itin>:
FJAL16<_X, (outs), (ins simm20:$imm),
!strconcat(asmstr, "\t$imm\n\tnop"),[],
itin> {
let isCodeGenOnly=1;
}
//
// EXT-I instruction format
//
@ -526,7 +535,19 @@ def DivRxRy16: FRR16_div_ins<0b11010, "div", IIAlu> {
def DivuRxRy16: FRR16_div_ins<0b11011, "divu", IIAlu> {
let Defs = [HI, LO];
}
//
// Format: JAL target MIPS16e
// Purpose: Jump and Link
// To execute a procedure call within the current 256 MB-aligned
// region and preserve the current ISA.
//
def Jal16 : FJAL16_ins<0b0, "jal", IIAlu> {
let isBranch = 1;
let hasDelaySlot = 0; // not true, but we add the nop for now
let isTerminator=1;
let isBarrier=1;
}
//
// Format: JR ra MIPS16e
@ -1070,12 +1091,14 @@ class UncondBranch16_pat<SDNode OpNode, Instruction I>:
let Predicates = [RelocPIC, InMips16Mode];
}
def : Mips16Pat<(MipsJmpLink (i32 tglobaladdr:$dst)),
(Jal16 tglobaladdr:$dst)>;
// Indirect branch
def: Mips16Pat<
(brind CPU16Regs:$rs),
(JrcRx16 CPU16Regs:$rs)>;
// Jump and Link (Call)
let isCall=1, hasDelaySlot=0 in
def JumpLinkReg16:
@ -1562,6 +1585,8 @@ def: Mips16Pat<(add CPU16Regs:$hi, (MipsLo tglobaladdr:$lo)),
// hi/lo relocs
def : Mips16Pat<(MipsHi tglobaladdr:$in),
(SllX16 (LiRxImmX16 tglobaladdr:$in), 16)>;
def : Mips16Pat<(MipsHi tglobaltlsaddr:$in),
(SllX16 (LiRxImmX16 tglobaltlsaddr:$in), 16)>;

4
lib/Target/Mips/MipsInstrInfo.td
View File

@ -232,6 +232,10 @@ def calltarget64: Operand<i64>;
def simm16 : Operand<i32> {
let DecoderMethod= "DecodeSimm16";
}
def simm20 : Operand<i32> {
}
def simm16_64 : Operand<i64>;
def shamt : Operand<i32>;

7
test/CodeGen/Mips/helloworld.ll
View File

@ -1,6 +1,8 @@
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=C1
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=C2
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PE
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=static -O3 < %s | FileCheck %s -check-prefix=ST1
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=static -O3 < %s | FileCheck %s -check-prefix=ST2
;
; re-enable this when mips16's jalr is fixed.
; DISABLED: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=SR
@ -29,6 +31,11 @@ entry:
; PE: li $2, 0
; PE: jrc $ra
; ST1: li ${{[0-9]+}}, %hi($.str)
; ST1: sll ${{[0-9]+}}, ${{[0-9]+}}, 16
; ST1: addiu ${{[0-9]+}}, %lo($.str)
; ST2: li ${{[0-9]+}}, %hi($.str)
; ST2: jal printf
}
declare i32 @printf(i8*, ...)