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[WebAssembly] Add AsmString strings for most instructions.
Mangling type information into MachineInstr opcode names was a temporary measure, and it's starting to get hairy. At the same time, the MC instruction printer wants to use AsmString strings for printing. This patch takes the first step, starting the process of adding AsmStrings for instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252203 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
parent
ae31b98bc3
commit
651ccf4012
@ -27,10 +27,12 @@
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let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
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def BR_IF_ : I<(outs), (ins bb_op:$dst, I32:$a),
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[(brcond I32:$a, bb:$dst)]>;
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[(brcond I32:$a, bb:$dst)],
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"br_if $dst, $a">;
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let isBarrier = 1 in {
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def BR : I<(outs), (ins bb_op:$dst),
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[(br bb:$dst)]>;
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[(br bb:$dst)],
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"br $dst">;
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} // isBarrier = 1
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} // isBranch = 1, isTerminator = 1, hasCtrlDep = 1
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@ -45,16 +47,17 @@ def SWITCH_I64 : I<(outs), (ins I64:$index, variable_ops),
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} // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
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// Placemarkers to indicate the start of a block or loop scope.
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def BLOCK : I<(outs), (ins bb_op:$dst), []>;
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def LOOP : I<(outs), (ins bb_op:$dst), []>;
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def BLOCK : I<(outs), (ins bb_op:$dst), [], "block $dst">;
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def LOOP : I<(outs), (ins bb_op:$dst), [], "loop $dst">;
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multiclass RETURN<WebAssemblyRegClass vt> {
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def RETURN_#vt : I<(outs), (ins vt:$val), [(WebAssemblyreturn vt:$val)]>;
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def RETURN_#vt : I<(outs), (ins vt:$val), [(WebAssemblyreturn vt:$val)],
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"return $val">;
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}
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let isReturn = 1, isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
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defm : RETURN<I32>;
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defm : RETURN<I64>;
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defm : RETURN<F32>;
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defm : RETURN<F64>;
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def RETURN_VOID : I<(outs), (ins), [(WebAssemblyreturn)]>;
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def RETURN_VOID : I<(outs), (ins), [(WebAssemblyreturn)], "return">;
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} // isReturn = 1, isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
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@ -13,58 +13,83 @@
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///
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//===----------------------------------------------------------------------===//
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def I64__WRAP_I32 : I<(outs I32:$dst), (ins I64:$src),
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[(set I32:$dst, (trunc I64:$src))]>;
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def i64__WRAP_i32 : I<(outs I32:$dst), (ins I64:$src),
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[(set I32:$dst, (trunc I64:$src))],
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"i32.wrap/i64 $dst, $src">;
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def I32__EXTEND_S_I64 : I<(outs I64:$dst), (ins I32:$src),
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[(set I64:$dst, (sext I32:$src))]>;
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[(set I64:$dst, (sext I32:$src))],
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"i64.extend_s/i32 $dst, $src">;
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def I32__EXTEND_U_I64 : I<(outs I64:$dst), (ins I32:$src),
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[(set I64:$dst, (zext I32:$src))]>;
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[(set I64:$dst, (zext I32:$src))],
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"i64.extend_u/i32 $dst, $src">;
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def F32__TRUNC_S_I32 : I<(outs I32:$dst), (ins F32:$src),
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[(set I32:$dst, (fp_to_sint F32:$src))]>;
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[(set I32:$dst, (fp_to_sint F32:$src))],
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"i32.trunc_s/f32 $dst, $src">;
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def F32__TRUNC_U_I32 : I<(outs I32:$dst), (ins F32:$src),
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[(set I32:$dst, (fp_to_uint F32:$src))]>;
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[(set I32:$dst, (fp_to_uint F32:$src))],
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"i32.trunc_u/f32 $dst, $src">;
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def F32__TRUNC_S_I64 : I<(outs I64:$dst), (ins F32:$src),
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[(set I64:$dst, (fp_to_sint F32:$src))]>;
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[(set I64:$dst, (fp_to_sint F32:$src))],
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"i64.trunc_s/f32 $dst, $src">;
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def F32__TRUNC_U_I64 : I<(outs I64:$dst), (ins F32:$src),
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[(set I64:$dst, (fp_to_uint F32:$src))]>;
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[(set I64:$dst, (fp_to_uint F32:$src))],
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"i64.trunc_u/f32 $dst, $src">;
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def F64__TRUNC_S_I32 : I<(outs I32:$dst), (ins F64:$src),
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[(set I32:$dst, (fp_to_sint F64:$src))]>;
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[(set I32:$dst, (fp_to_sint F64:$src))],
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"i32.trunc_s/f64 $dst, $src">;
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def F64__TRUNC_U_I32 : I<(outs I32:$dst), (ins F64:$src),
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[(set I32:$dst, (fp_to_uint F64:$src))]>;
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[(set I32:$dst, (fp_to_uint F64:$src))],
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"i32.trunc_u/f64 $dst, $src">;
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def F64__TRUNC_S_I64 : I<(outs I64:$dst), (ins F64:$src),
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[(set I64:$dst, (fp_to_sint F64:$src))]>;
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[(set I64:$dst, (fp_to_sint F64:$src))],
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"i64.trunc_s/f64 $dst, $src">;
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def F64__TRUNC_U_I64 : I<(outs I64:$dst), (ins F64:$src),
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[(set I64:$dst, (fp_to_uint F64:$src))]>;
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[(set I64:$dst, (fp_to_uint F64:$src))],
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"i64.trunc_u/f64 $dst, $src">;
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def I32__CONVERT_S_F32 : I<(outs F32:$dst), (ins I32:$src),
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[(set F32:$dst, (sint_to_fp I32:$src))]>;
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[(set F32:$dst, (sint_to_fp I32:$src))],
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"f32.convert_s/i32 $dst, $src">;
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def I32__CONVERT_U_F32 : I<(outs F32:$dst), (ins I32:$src),
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[(set F32:$dst, (uint_to_fp I32:$src))]>;
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[(set F32:$dst, (uint_to_fp I32:$src))],
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"f32.convert_u/i32 $dst, $src">;
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def I32__CONVERT_S_F64 : I<(outs F64:$dst), (ins I32:$src),
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[(set F64:$dst, (sint_to_fp I32:$src))]>;
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[(set F64:$dst, (sint_to_fp I32:$src))],
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"f64.convert_s/i32 $dst, $src">;
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def I32__CONVERT_U_F64 : I<(outs F64:$dst), (ins I32:$src),
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[(set F64:$dst, (uint_to_fp I32:$src))]>;
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[(set F64:$dst, (uint_to_fp I32:$src))],
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"f64.convert_u/i32 $dst, $src">;
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def I64__CONVERT_S_F32 : I<(outs F32:$dst), (ins I64:$src),
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[(set F32:$dst, (sint_to_fp I64:$src))]>;
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[(set F32:$dst, (sint_to_fp I64:$src))],
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"f32.convert_s/i64 $dst, $src">;
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def I64__CONVERT_U_F32 : I<(outs F32:$dst), (ins I64:$src),
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[(set F32:$dst, (uint_to_fp I64:$src))]>;
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[(set F32:$dst, (uint_to_fp I64:$src))],
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"f32.convert_u/i64 $dst, $src">;
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def I64__CONVERT_S_F64 : I<(outs F64:$dst), (ins I64:$src),
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[(set F64:$dst, (sint_to_fp I64:$src))]>;
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[(set F64:$dst, (sint_to_fp I64:$src))],
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"f64.convert_s/i64 $dst, $src">;
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def I64__CONVERT_U_F64 : I<(outs F64:$dst), (ins I64:$src),
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[(set F64:$dst, (uint_to_fp I64:$src))]>;
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[(set F64:$dst, (uint_to_fp I64:$src))],
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"f64.convert_u/i64 $dst, $src">;
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def F32__PROMOTE_F64 : I<(outs F64:$dst), (ins F32:$src),
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[(set F64:$dst, (fextend F32:$src))]>;
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[(set F64:$dst, (fextend F32:$src))],
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"f64.promote/f32 $dst, $src">;
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def F64__DEMOTE_F32 : I<(outs F32:$dst), (ins F64:$src),
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[(set F32:$dst, (fround F64:$src))]>;
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[(set F32:$dst, (fround F64:$src))],
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"f32.demote/f64 $dst, $src">;
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def F32__REINTERPRET_I32 : I<(outs I32:$dst), (ins F32:$src),
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[(set I32:$dst, (bitconvert F32:$src))]>;
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[(set I32:$dst, (bitconvert F32:$src))],
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"i32.reinterpret/f32 $dst, $src">;
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def I32__REINTERPRET_F32 : I<(outs F32:$dst), (ins I32:$src),
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[(set F32:$dst, (bitconvert I32:$src))]>;
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[(set F32:$dst, (bitconvert I32:$src))],
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"f32.reinterpret/i32 $dst, $src">;
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def F64__REINTERPRET_I64 : I<(outs I64:$dst), (ins F64:$src),
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[(set I64:$dst, (bitconvert F64:$src))]>;
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[(set I64:$dst, (bitconvert F64:$src))],
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"i64.reinterpret/f64 $dst, $src">;
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def I64__REINTERPRET_F64 : I<(outs F64:$dst), (ins I64:$src),
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[(set F64:$dst, (bitconvert I64:$src))]>;
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[(set F64:$dst, (bitconvert I64:$src))],
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"f64.reinterpret/i64 $dst, $src">;
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@ -12,31 +12,31 @@
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///
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//===----------------------------------------------------------------------===//
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defm ADD : BinaryFP<fadd>;
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defm SUB : BinaryFP<fsub>;
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defm MUL : BinaryFP<fmul>;
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defm DIV : BinaryFP<fdiv>;
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defm SQRT : UnaryFP<fsqrt>;
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defm ADD : BinaryFP<fadd, "add">;
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defm SUB : BinaryFP<fsub, "sub">;
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defm MUL : BinaryFP<fmul, "mul">;
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defm DIV : BinaryFP<fdiv, "div">;
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defm SQRT : UnaryFP<fsqrt, "sqrt">;
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defm ABS : UnaryFP<fabs>;
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defm NEG : UnaryFP<fneg>;
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defm COPYSIGN : BinaryFP<fcopysign>;
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defm ABS : UnaryFP<fabs, "abs">;
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defm NEG : UnaryFP<fneg, "neg">;
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defm COPYSIGN : BinaryFP<fcopysign, "copysign">;
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defm CEIL : UnaryFP<fceil>;
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defm FLOOR : UnaryFP<ffloor>;
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defm TRUNC : UnaryFP<ftrunc>;
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defm NEAREST : UnaryFP<fnearbyint>;
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defm CEIL : UnaryFP<fceil, "ceil">;
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defm FLOOR : UnaryFP<ffloor, "floor">;
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defm TRUNC : UnaryFP<ftrunc, "trunc">;
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defm NEAREST : UnaryFP<fnearbyint, "nearest">;
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// WebAssembly doesn't expose inexact exceptions, so map frint to fnearbyint.
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def : Pat<(frint f32:$src), (NEAREST_F32 f32:$src)>;
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def : Pat<(frint f64:$src), (NEAREST_F64 f64:$src)>;
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defm EQ : ComparisonFP<SETOEQ>;
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defm NE : ComparisonFP<SETUNE>;
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defm LT : ComparisonFP<SETOLT>;
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defm LE : ComparisonFP<SETOLE>;
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defm GT : ComparisonFP<SETOGT>;
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defm GE : ComparisonFP<SETOGE>;
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defm EQ : ComparisonFP<SETOEQ, "eq">;
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defm NE : ComparisonFP<SETUNE, "ne">;
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defm LT : ComparisonFP<SETOLT, "lt">;
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defm LE : ComparisonFP<SETOLE, "le">;
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defm GT : ComparisonFP<SETOGT, "gt">;
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defm GE : ComparisonFP<SETOGE, "ge">;
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// Don't care floating-point comparisons, supported via other comparisons.
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def : Pat<(seteq f32:$lhs, f32:$rhs), (EQ_F32 f32:$lhs, f32:$rhs)>;
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@ -60,6 +60,8 @@ def : Pat<(setge f64:$lhs, f64:$rhs), (GE_F64 f64:$lhs, f64:$rhs)>;
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*/
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def SELECT_F32 : I<(outs F32:$dst), (ins I32:$cond, F32:$lhs, F32:$rhs),
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[(set F32:$dst, (select I32:$cond, F32:$lhs, F32:$rhs))]>;
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[(set F32:$dst, (select I32:$cond, F32:$lhs, F32:$rhs))],
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"f32.select $dst, $cond, $lhs, $rhs">;
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def SELECT_F64 : I<(outs F64:$dst), (ins I32:$cond, F64:$lhs, F64:$rhs),
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[(set F64:$dst, (select I32:$cond, F64:$lhs, F64:$rhs))]>;
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[(set F64:$dst, (select I32:$cond, F64:$lhs, F64:$rhs))],
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"f64.select $dst, $cond, $lhs, $rhs">;
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@ -13,55 +13,67 @@
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//===----------------------------------------------------------------------===//
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// WebAssembly Instruction Format.
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class WebAssemblyInst<string cstr> : Instruction {
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class WebAssemblyInst<string asmstr> : Instruction {
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field bits<0> Inst; // Instruction encoding.
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let Namespace = "WebAssembly";
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let Pattern = [];
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let Constraints = cstr;
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let AsmString = asmstr;
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}
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// Normal instructions.
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class I<dag oops, dag iops, list<dag> pattern, string cstr = "">
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: WebAssemblyInst<cstr> {
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class I<dag oops, dag iops, list<dag> pattern, string asmstr = "">
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: WebAssemblyInst<asmstr> {
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dag OutOperandList = oops;
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dag InOperandList = iops;
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let Pattern = pattern;
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}
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// Unary and binary instructions, for the local types that WebAssembly supports.
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multiclass UnaryInt<SDNode node> {
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multiclass UnaryInt<SDNode node, string name> {
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def _I32 : I<(outs I32:$dst), (ins I32:$src),
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[(set I32:$dst, (node I32:$src))]>;
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[(set I32:$dst, (node I32:$src))],
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!strconcat("i32.", !strconcat(name, " $dst, $src"))>;
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def _I64 : I<(outs I64:$dst), (ins I64:$src),
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[(set I64:$dst, (node I64:$src))]>;
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[(set I64:$dst, (node I64:$src))],
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!strconcat("i64.", !strconcat(name, " $dst, $src"))>;
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}
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multiclass BinaryInt<SDNode node> {
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multiclass BinaryInt<SDNode node, string name> {
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def _I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs),
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[(set I32:$dst, (node I32:$lhs, I32:$rhs))]>;
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[(set I32:$dst, (node I32:$lhs, I32:$rhs))],
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!strconcat("i32.", !strconcat(name, " $dst, $lhs, $rhs"))>;
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def _I64 : I<(outs I64:$dst), (ins I64:$lhs, I64:$rhs),
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[(set I64:$dst, (node I64:$lhs, I64:$rhs))]>;
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[(set I64:$dst, (node I64:$lhs, I64:$rhs))],
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!strconcat("i64.", !strconcat(name, " $dst, $lhs, $rhs"))>;
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}
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multiclass UnaryFP<SDNode node> {
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multiclass UnaryFP<SDNode node, string name> {
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def _F32 : I<(outs F32:$dst), (ins F32:$src),
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[(set F32:$dst, (node F32:$src))]>;
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[(set F32:$dst, (node F32:$src))],
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!strconcat("f32.", !strconcat(name, " $dst, $src"))>;
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def _F64 : I<(outs F64:$dst), (ins F64:$src),
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[(set F64:$dst, (node F64:$src))]>;
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[(set F64:$dst, (node F64:$src))],
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!strconcat("f64.", !strconcat(name, " $dst, $src"))>;
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}
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multiclass BinaryFP<SDNode node> {
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multiclass BinaryFP<SDNode node, string name> {
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def _F32 : I<(outs F32:$dst), (ins F32:$lhs, F32:$rhs),
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[(set F32:$dst, (node F32:$lhs, F32:$rhs))]>;
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[(set F32:$dst, (node F32:$lhs, F32:$rhs))],
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!strconcat("f32.", !strconcat(name, " $dst, $lhs, $rhs"))>;
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def _F64 : I<(outs F64:$dst), (ins F64:$lhs, F64:$rhs),
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[(set F64:$dst, (node F64:$lhs, F64:$rhs))]>;
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[(set F64:$dst, (node F64:$lhs, F64:$rhs))],
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!strconcat("f64.", !strconcat(name, " $dst, $lhs, $rhs"))>;
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}
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multiclass ComparisonInt<CondCode cond> {
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multiclass ComparisonInt<CondCode cond, string name> {
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def _I32 : I<(outs I32:$dst), (ins I32:$lhs, I32:$rhs),
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[(set I32:$dst, (setcc I32:$lhs, I32:$rhs, cond))]>;
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[(set I32:$dst, (setcc I32:$lhs, I32:$rhs, cond))],
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!strconcat("i32.", !strconcat(name, " $dst, $lhs, $rhs"))>;
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def _I64 : I<(outs I32:$dst), (ins I64:$lhs, I64:$rhs),
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[(set I32:$dst, (setcc I64:$lhs, I64:$rhs, cond))]>;
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[(set I32:$dst, (setcc I64:$lhs, I64:$rhs, cond))],
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!strconcat("i64.", !strconcat(name, " $dst, $lhs, $rhs"))>;
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}
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multiclass ComparisonFP<CondCode cond> {
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multiclass ComparisonFP<CondCode cond, string name> {
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def _F32 : I<(outs I32:$dst), (ins F32:$lhs, F32:$rhs),
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[(set I32:$dst, (setcc F32:$lhs, F32:$rhs, cond))]>;
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[(set I32:$dst, (setcc F32:$lhs, F32:$rhs, cond))],
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!strconcat("f32.", !strconcat(name, " $dst, $lhs, $rhs"))>;
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def _F64 : I<(outs I32:$dst), (ins F64:$lhs, F64:$rhs),
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[(set I32:$dst, (setcc F64:$lhs, F64:$rhs, cond))]>;
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[(set I32:$dst, (setcc F64:$lhs, F64:$rhs, cond))],
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!strconcat("f64.", !strconcat(name, " $dst, $lhs, $rhs"))>;
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}
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@ -94,19 +94,25 @@ defm : ARGUMENT<F64>;
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def Immediate_I32 : I<(outs I32:$res), (ins i32imm:$imm),
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[(set I32:$res, imm:$imm)]>;
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[(set I32:$res, imm:$imm)],
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"i32.const $res, $imm">;
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def Immediate_I64 : I<(outs I64:$res), (ins i64imm:$imm),
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[(set I64:$res, imm:$imm)]>;
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[(set I64:$res, imm:$imm)],
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"i64.const $res, $imm">;
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def Immediate_F32 : I<(outs F32:$res), (ins f32imm:$imm),
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[(set F32:$res, fpimm:$imm)]>;
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[(set F32:$res, fpimm:$imm)],
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"f32.const $res, $imm">;
|
||||
def Immediate_F64 : I<(outs F64:$res), (ins f64imm:$imm),
|
||||
[(set F64:$res, fpimm:$imm)]>;
|
||||
[(set F64:$res, fpimm:$imm)],
|
||||
"f64.const $res, $imm">;
|
||||
|
||||
// Special types of immediates. FIXME: Hard-coded as 32-bit for now.
|
||||
def GLOBAL : I<(outs I32:$dst), (ins global:$addr),
|
||||
[(set I32:$dst, (WebAssemblywrapper tglobaladdr:$addr))]>;
|
||||
[(set I32:$dst, (WebAssemblywrapper tglobaladdr:$addr))],
|
||||
"global $dst, $addr">;
|
||||
def JUMP_TABLE : I<(outs I32:$dst), (ins tjumptable_op:$addr),
|
||||
[(set I32:$dst, (WebAssemblywrapper tjumptable:$addr))]>;
|
||||
[(set I32:$dst, (WebAssemblywrapper tjumptable:$addr))],
|
||||
"jump_table $dst, $addr">;
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Additional sets of instructions.
|
||||
|
||||
@ -12,34 +12,34 @@
|
||||
///
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
defm ADD : BinaryInt<add>;
|
||||
defm SUB : BinaryInt<sub>;
|
||||
defm MUL : BinaryInt<mul>;
|
||||
defm DIV_S : BinaryInt<sdiv>;
|
||||
defm DIV_U : BinaryInt<udiv>;
|
||||
defm REM_S : BinaryInt<srem>;
|
||||
defm REM_U : BinaryInt<urem>;
|
||||
defm AND : BinaryInt<and>;
|
||||
defm OR : BinaryInt<or>;
|
||||
defm XOR : BinaryInt<xor>;
|
||||
defm SHL : BinaryInt<shl>;
|
||||
defm SHR_U : BinaryInt<srl>;
|
||||
defm SHR_S : BinaryInt<sra>;
|
||||
defm ADD : BinaryInt<add, "add">;
|
||||
defm SUB : BinaryInt<sub, "sub">;
|
||||
defm MUL : BinaryInt<mul, "mul">;
|
||||
defm DIV_S : BinaryInt<sdiv, "div_s">;
|
||||
defm DIV_U : BinaryInt<udiv, "div_u">;
|
||||
defm REM_S : BinaryInt<srem, "rem_s">;
|
||||
defm REM_U : BinaryInt<urem, "rem_u">;
|
||||
defm AND : BinaryInt<and, "and">;
|
||||
defm OR : BinaryInt<or, "or">;
|
||||
defm XOR : BinaryInt<xor, "xor">;
|
||||
defm SHL : BinaryInt<shl, "shl">;
|
||||
defm SHR_U : BinaryInt<srl, "shr_u">;
|
||||
defm SHR_S : BinaryInt<sra, "shr_s">;
|
||||
|
||||
defm EQ : ComparisonInt<SETEQ>;
|
||||
defm NE : ComparisonInt<SETNE>;
|
||||
defm LT_S : ComparisonInt<SETLT>;
|
||||
defm LE_S : ComparisonInt<SETLE>;
|
||||
defm LT_U : ComparisonInt<SETULT>;
|
||||
defm LE_U : ComparisonInt<SETULE>;
|
||||
defm GT_S : ComparisonInt<SETGT>;
|
||||
defm GE_S : ComparisonInt<SETGE>;
|
||||
defm GT_U : ComparisonInt<SETUGT>;
|
||||
defm GE_U : ComparisonInt<SETUGE>;
|
||||
defm EQ : ComparisonInt<SETEQ, "eq">;
|
||||
defm NE : ComparisonInt<SETNE, "ne">;
|
||||
defm LT_S : ComparisonInt<SETLT, "lt_s">;
|
||||
defm LE_S : ComparisonInt<SETLE, "le_s">;
|
||||
defm LT_U : ComparisonInt<SETULT, "lt_u">;
|
||||
defm LE_U : ComparisonInt<SETULE, "le_u">;
|
||||
defm GT_S : ComparisonInt<SETGT, "gt_s">;
|
||||
defm GE_S : ComparisonInt<SETGE, "ge_s">;
|
||||
defm GT_U : ComparisonInt<SETUGT, "gt_u">;
|
||||
defm GE_U : ComparisonInt<SETUGE, "ge_u">;
|
||||
|
||||
defm CLZ : UnaryInt<ctlz>;
|
||||
defm CTZ : UnaryInt<cttz>;
|
||||
defm POPCNT : UnaryInt<ctpop>;
|
||||
defm CLZ : UnaryInt<ctlz, "clz">;
|
||||
defm CTZ : UnaryInt<cttz, "ctz">;
|
||||
defm POPCNT : UnaryInt<ctpop, "popcnt">;
|
||||
|
||||
// Expand the "don't care" operations to supported operations.
|
||||
def : Pat<(ctlz_zero_undef I32:$src), (CLZ_I32 I32:$src)>;
|
||||
@ -48,6 +48,8 @@ def : Pat<(cttz_zero_undef I32:$src), (CTZ_I32 I32:$src)>;
|
||||
def : Pat<(cttz_zero_undef I64:$src), (CTZ_I64 I64:$src)>;
|
||||
|
||||
def SELECT_I32 : I<(outs I32:$dst), (ins I32:$cond, I32:$lhs, I32:$rhs),
|
||||
[(set I32:$dst, (select I32:$cond, I32:$lhs, I32:$rhs))]>;
|
||||
[(set I32:$dst, (select I32:$cond, I32:$lhs, I32:$rhs))],
|
||||
"i32.select $dst, $cond, $lhs, $rhs">;
|
||||
def SELECT_I64 : I<(outs I64:$dst), (ins I32:$cond, I64:$lhs, I64:$rhs),
|
||||
[(set I64:$dst, (select I32:$cond, I64:$lhs, I64:$rhs))]>;
|
||||
[(set I64:$dst, (select I32:$cond, I64:$lhs, I64:$rhs))],
|
||||
"i32.select $dst, $cond, $lhs, $rhs">;
|
||||
|
||||
@ -24,35 +24,49 @@
|
||||
|
||||
// Basic load.
|
||||
def LOAD_I32 : I<(outs I32:$dst), (ins I32:$addr),
|
||||
[(set I32:$dst, (load I32:$addr))]>;
|
||||
[(set I32:$dst, (load I32:$addr))],
|
||||
"i32.load $dst, $addr">;
|
||||
def LOAD_I64 : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (load I32:$addr))]>;
|
||||
[(set I64:$dst, (load I32:$addr))],
|
||||
"i64.load $dst, $addr">;
|
||||
def LOAD_F32 : I<(outs F32:$dst), (ins I32:$addr),
|
||||
[(set F32:$dst, (load I32:$addr))]>;
|
||||
[(set F32:$dst, (load I32:$addr))],
|
||||
"f32.load $dst, $addr">;
|
||||
def LOAD_F64 : I<(outs F64:$dst), (ins I32:$addr),
|
||||
[(set F64:$dst, (load I32:$addr))]>;
|
||||
[(set F64:$dst, (load I32:$addr))],
|
||||
"f64.load $dst, $addr">;
|
||||
|
||||
// Extending load.
|
||||
def LOAD8_S_I32 : I<(outs I32:$dst), (ins I32:$addr),
|
||||
[(set I32:$dst, (sextloadi8 I32:$addr))]>;
|
||||
[(set I32:$dst, (sextloadi8 I32:$addr))],
|
||||
"i32.load8_s $dst, $addr">;
|
||||
def LOAD8_U_I32 : I<(outs I32:$dst), (ins I32:$addr),
|
||||
[(set I32:$dst, (zextloadi8 I32:$addr))]>;
|
||||
[(set I32:$dst, (zextloadi8 I32:$addr))],
|
||||
"i32.load8_u $dst, $addr">;
|
||||
def LOAD16_S_I32 : I<(outs I32:$dst), (ins I32:$addr),
|
||||
[(set I32:$dst, (sextloadi16 I32:$addr))]>;
|
||||
[(set I32:$dst, (sextloadi16 I32:$addr))],
|
||||
"i32.load16_s $dst, $addr">;
|
||||
def LOAD16_U_I32 : I<(outs I32:$dst), (ins I32:$addr),
|
||||
[(set I32:$dst, (zextloadi16 I32:$addr))]>;
|
||||
[(set I32:$dst, (zextloadi16 I32:$addr))],
|
||||
"i32.load16_u $dst, $addr">;
|
||||
def LOAD8_S_I64 : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (sextloadi8 I32:$addr))]>;
|
||||
[(set I64:$dst, (sextloadi8 I32:$addr))],
|
||||
"i64.load8_s $dst, $addr">;
|
||||
def LOAD8_U_I64 : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (zextloadi8 I32:$addr))]>;
|
||||
[(set I64:$dst, (zextloadi8 I32:$addr))],
|
||||
"i64.load8_u $dst, $addr">;
|
||||
def LOAD16_S_I64 : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (sextloadi16 I32:$addr))]>;
|
||||
[(set I64:$dst, (sextloadi16 I32:$addr))],
|
||||
"i64.load16_s $dst, $addr">;
|
||||
def LOAD16_U_I64 : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (zextloadi16 I32:$addr))]>;
|
||||
[(set I64:$dst, (zextloadi16 I32:$addr))],
|
||||
"i64.load16_u $dst, $addr">;
|
||||
def LOAD32_S_I64 : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (sextloadi32 I32:$addr))]>;
|
||||
[(set I64:$dst, (sextloadi32 I32:$addr))],
|
||||
"i64.load32_s $dst, $addr">;
|
||||
def LOAD32_U_I64 : I<(outs I64:$dst), (ins I32:$addr),
|
||||
[(set I64:$dst, (zextloadi32 I32:$addr))]>;
|
||||
[(set I64:$dst, (zextloadi32 I32:$addr))],
|
||||
"i64.load32_u $dst, $addr">;
|
||||
|
||||
// "Don't care" extending load become zero-extending load.
|
||||
def : Pat<(i32 (extloadi8 I32:$addr)), (LOAD8_U_I32 $addr)>;
|
||||
@ -64,38 +78,51 @@ def : Pat<(i64 (extloadi32 I32:$addr)), (LOAD32_U_I64 $addr)>;
|
||||
// Basic store.
|
||||
// Note: WebAssembly inverts SelectionDAG's usual operand order.
|
||||
def STORE_I32 : I<(outs), (ins I32:$addr, I32:$val),
|
||||
[(store i32:$val, I32:$addr)]>;
|
||||
[(store i32:$val, I32:$addr)],
|
||||
"i32.store $addr, $val">;
|
||||
def STORE_I64 : I<(outs), (ins I32:$addr, I64:$val),
|
||||
[(store i64:$val, I32:$addr)]>;
|
||||
[(store i64:$val, I32:$addr)],
|
||||
"i64.store $addr, $val">;
|
||||
def STORE_F32 : I<(outs), (ins I32:$addr, F32:$val),
|
||||
[(store f32:$val, I32:$addr)]>;
|
||||
[(store f32:$val, I32:$addr)],
|
||||
"i64.store $addr, $val">;
|
||||
def STORE_F64 : I<(outs), (ins I32:$addr, F64:$val),
|
||||
[(store f64:$val, I32:$addr)]>;
|
||||
[(store f64:$val, I32:$addr)],
|
||||
"i64.store $addr, $val">;
|
||||
|
||||
// Truncating store.
|
||||
def STORE8_I32 : I<(outs), (ins I32:$addr, I32:$val),
|
||||
[(truncstorei8 I32:$val, I32:$addr)]>;
|
||||
[(truncstorei8 I32:$val, I32:$addr)],
|
||||
"i32.store8 $addr, $val">;
|
||||
def STORE16_I32 : I<(outs), (ins I32:$addr, I32:$val),
|
||||
[(truncstorei16 I32:$val, I32:$addr)]>;
|
||||
[(truncstorei16 I32:$val, I32:$addr)],
|
||||
"i32.store16 $addr, $val">;
|
||||
def STORE8_I64 : I<(outs), (ins I32:$addr, I64:$val),
|
||||
[(truncstorei8 I64:$val, I32:$addr)]>;
|
||||
[(truncstorei8 I64:$val, I32:$addr)],
|
||||
"i64.store8 $addr, $val">;
|
||||
def STORE16_I64 : I<(outs), (ins I32:$addr, I64:$val),
|
||||
[(truncstorei16 I64:$val, I32:$addr)]>;
|
||||
[(truncstorei16 I64:$val, I32:$addr)],
|
||||
"i64.store16 $addr, $val">;
|
||||
def STORE32_I64 : I<(outs), (ins I32:$addr, I64:$val),
|
||||
[(truncstorei32 I64:$val, I32:$addr)]>;
|
||||
[(truncstorei32 I64:$val, I32:$addr)],
|
||||
"i64.store32 $addr, $val">;
|
||||
|
||||
// Memory size.
|
||||
def memory_size_I32 : I<(outs I32:$dst), (ins),
|
||||
[(set I32:$dst, (int_wasm_memory_size))]>,
|
||||
[(set I32:$dst, (int_wasm_memory_size))],
|
||||
"i32.memory_size $dst">,
|
||||
Requires<[HasAddr32]>;
|
||||
def memory_size_I64 : I<(outs I64:$dst), (ins),
|
||||
[(set I64:$dst, (int_wasm_memory_size))]>,
|
||||
[(set I64:$dst, (int_wasm_memory_size))],
|
||||
"i64.memory_size $dst">,
|
||||
Requires<[HasAddr64]>;
|
||||
|
||||
// Grow memory.
|
||||
def grow_memory_I32 : I<(outs), (ins I32:$delta),
|
||||
[(int_wasm_grow_memory I32:$delta)]>,
|
||||
[(int_wasm_grow_memory I32:$delta)],
|
||||
"i32.grow_memory $delta">,
|
||||
Requires<[HasAddr32]>;
|
||||
def grow_memory_I64 : I<(outs), (ins I64:$delta),
|
||||
[(int_wasm_grow_memory I64:$delta)]>,
|
||||
[(int_wasm_grow_memory I64:$delta)],
|
||||
"i64.grow_memory $delta">,
|
||||
Requires<[HasAddr64]>;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user