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Move the subtarget dependent features from XCoreTargetMachine

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down to the subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212147 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2014-07-02 00:10:09 +00:00
parent 9223ec2cd9
commit 65e0e46118
6 changed files with 42 additions and 37 deletions
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7
lib/Target/XCore/XCoreISelLowering.cpp
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@ -68,10 +68,9 @@ getTargetNodeName(unsigned Opcode) const
}
}
XCoreTargetLowering::XCoreTargetLowering(XCoreTargetMachine &XTM)
: TargetLowering(XTM, new XCoreTargetObjectFile()),
TM(XTM),
Subtarget(*XTM.getSubtargetImpl()) {
XCoreTargetLowering::XCoreTargetLowering(const TargetMachine &TM)
: TargetLowering(TM, new XCoreTargetObjectFile()), TM(TM),
Subtarget(TM.getSubtarget<XCoreSubtarget>()) {
// Set up the register classes.
addRegisterClass(MVT::i32, &XCore::GRRegsRegClass);

4
lib/Target/XCore/XCoreISelLowering.h
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@ -94,7 +94,7 @@ namespace llvm {
{
public:
explicit XCoreTargetLowering(XCoreTargetMachine &TM);
explicit XCoreTargetLowering(const TargetMachine &TM);
using TargetLowering::isZExtFree;
bool isZExtFree(SDValue Val, EVT VT2) const override;
@ -123,7 +123,7 @@ namespace llvm {
bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
private:
const XCoreTargetMachine &TM;
const TargetMachine &TM;
const XCoreSubtarget &Subtarget;
// Lower Operand helpers

10
lib/Target/XCore/XCoreSubtarget.cpp
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@ -25,8 +25,8 @@ using namespace llvm;
void XCoreSubtarget::anchor() { }
XCoreSubtarget::XCoreSubtarget(const std::string &TT,
const std::string &CPU, const std::string &FS)
: XCoreGenSubtargetInfo(TT, CPU, FS)
{
}
XCoreSubtarget::XCoreSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, const TargetMachine &TM)
: XCoreGenSubtargetInfo(TT, CPU, FS),
DL("e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32"),
InstrInfo(), FrameLowering(*this), TLInfo(TM), TSInfo(DL) {}

21
lib/Target/XCore/XCoreSubtarget.h
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@ -14,6 +14,11 @@
#ifndef XCORESUBTARGET_H
#define XCORESUBTARGET_H
#include "XCoreFrameLowering.h"
#include "XCoreISelLowering.h"
#include "XCoreInstrInfo.h"
#include "XCoreSelectionDAGInfo.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <string>
@ -26,17 +31,31 @@ class StringRef;
class XCoreSubtarget : public XCoreGenSubtargetInfo {
virtual void anchor();
const DataLayout DL; // Calculates type size & alignment
XCoreInstrInfo InstrInfo;
XCoreFrameLowering FrameLowering;
XCoreTargetLowering TLInfo;
XCoreSelectionDAGInfo TSInfo;
public:
/// This constructor initializes the data members to match that
/// of the specified triple.
///
XCoreSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS);
const std::string &FS, const TargetMachine &TM);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
const XCoreInstrInfo *getInstrInfo() const { return &InstrInfo; }
const XCoreFrameLowering *getFrameLowering() const { return &FrameLowering; }
const XCoreTargetLowering *getTargetLowering() const { return &TLInfo; }
const XCoreSelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
const TargetRegisterInfo *getRegisterInfo() const {
return &InstrInfo.getRegisterInfo();
}
const DataLayout *getDataLayout() const { return &DL; }
};
} // End llvm namespace

9
lib/Target/XCore/XCoreTargetMachine.cpp
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@ -25,13 +25,8 @@ XCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT,
const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
Subtarget(TT, CPU, FS),
DL("e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32"),
InstrInfo(),
FrameLowering(Subtarget),
TLInfo(*this),
TSInfo(DL) {
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
}

28
lib/Target/XCore/XCoreTargetMachine.h
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@ -14,46 +14,38 @@
#ifndef XCORETARGETMACHINE_H
#define XCORETARGETMACHINE_H
#include "XCoreFrameLowering.h"
#include "XCoreISelLowering.h"
#include "XCoreInstrInfo.h"
#include "XCoreSelectionDAGInfo.h"
#include "XCoreSubtarget.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
namespace llvm {
class XCoreTargetMachine : public LLVMTargetMachine {
XCoreSubtarget Subtarget;
const DataLayout DL; // Calculates type size & alignment
XCoreInstrInfo InstrInfo;
XCoreFrameLowering FrameLowering;
XCoreTargetLowering TLInfo;
XCoreSelectionDAGInfo TSInfo;
public:
XCoreTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, const TargetOptions &Options,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL);
const XCoreInstrInfo *getInstrInfo() const override { return &InstrInfo; }
const XCoreInstrInfo *getInstrInfo() const override {
return getSubtargetImpl()->getInstrInfo();
}
const XCoreFrameLowering *getFrameLowering() const override {
return &FrameLowering;
return getSubtargetImpl()->getFrameLowering();
}
const XCoreSubtarget *getSubtargetImpl() const override { return &Subtarget; }
const XCoreTargetLowering *getTargetLowering() const override {
return &TLInfo;
return getSubtargetImpl()->getTargetLowering();
}
const XCoreSelectionDAGInfo* getSelectionDAGInfo() const override {
return &TSInfo;
return getSubtargetImpl()->getSelectionDAGInfo();
}
const TargetRegisterInfo *getRegisterInfo() const override {
return &InstrInfo.getRegisterInfo();
return getSubtargetImpl()->getRegisterInfo();
}
const DataLayout *getDataLayout() const override {
return getSubtargetImpl()->getDataLayout();
}
const DataLayout *getDataLayout() const override { return &DL; }
// Pass Pipeline Configuration
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;