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FsFLD0S{S|D} and V_SETALLONES are as cheap as moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55466 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -458,7 +458,7 @@ def Int_COMISSrm: PSI<0x2F, MRMSrcMem, (outs),
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// start with 'Fs'.
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// Alias instructions that map fld0 to pxor for sse.
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let isReMaterializable = 1 in
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let isReMaterializable = 1, isAsCheapAsAMove = 1 in
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def FsFLD0SS : I<0xEF, MRMInitReg, (outs FR32:$dst), (ins),
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"pxor\t$dst, $dst", [(set FR32:$dst, fp32imm0)]>,
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Requires<[HasSSE1]>, TB, OpSize;
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@ -1192,7 +1192,7 @@ def Int_COMISDrm: PDI<0x2F, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2),
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// start with 'Fs'.
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// Alias instructions that map fld0 to pxor for sse.
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let isReMaterializable = 1 in
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let isReMaterializable = 1, isAsCheapAsAMove = 1 in
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def FsFLD0SD : I<0xEF, MRMInitReg, (outs FR64:$dst), (ins),
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"pxor\t$dst, $dst", [(set FR64:$dst, fpimm0)]>,
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Requires<[HasSSE2]>, TB, OpSize;
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@ -2241,7 +2241,7 @@ def : Pat<(membarrier (i8 imm:$ll), (i8 imm:$ls), (i8 imm:$sl), (i8 imm:$ss),
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(i8 1)), (MFENCE)>;
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// Alias instructions that map zero vector to pxor / xorp* for sse.
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let isReMaterializable = 1 in
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let isReMaterializable = 1, isAsCheapAsAMove = 1 in
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def V_SETALLONES : PDI<0x76, MRMInitReg, (outs VR128:$dst), (ins),
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"pcmpeqd\t$dst, $dst",
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[(set VR128:$dst, (v4i32 immAllOnesV))]>;
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