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[ValueTracking] allow non-canonical shuffles when computing signbits
This possibility is noted in D53987 for a different case, so we need to adjust the existing code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345988 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2511,27 +2511,29 @@ static unsigned ComputeNumSignBitsImpl(const Value *V, unsigned Depth,
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// extended, shifted, etc).
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return ComputeNumSignBits(U->getOperand(0), Depth + 1, Q);
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case Instruction::ShuffleVector:
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case Instruction::ShuffleVector: {
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// If the shuffle mask contains any undefined elements, that element of the
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// result is undefined. Propagating information from a source operand may
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// not be correct in that case, so just bail out.
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if (cast<ShuffleVectorInst>(U)->getMask()->containsUndefElement())
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break;
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assert((!isa<UndefValue>(U->getOperand(0)) ||
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!isa<UndefValue>(U->getOperand(1)))
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&& "Should have simplified shuffle with 2 undef inputs");
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// If everything is undef, we can't say anything. This should be simplified.
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Value *Op0 = U->getOperand(0), *Op1 = U->getOperand(1);
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if (isa<UndefValue>(Op0) && isa<UndefValue>(Op1))
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break;
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// Look through shuffle of 1 source vector.
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if (isa<UndefValue>(U->getOperand(0)))
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return ComputeNumSignBits(U->getOperand(1), Depth + 1, Q);
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if (isa<UndefValue>(U->getOperand(1)))
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return ComputeNumSignBits(U->getOperand(0), Depth + 1, Q);
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if (isa<UndefValue>(Op0))
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return ComputeNumSignBits(Op1, Depth + 1, Q);
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if (isa<UndefValue>(Op1))
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return ComputeNumSignBits(Op0, Depth + 1, Q);
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// TODO: We can look through shuffles of 2 sources by computing the minimum
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// sign bits for each operand (similar to what we do for binops).
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break;
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}
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}
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// Finally, if we can prove that the top bits of the result are 0's or 1's,
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// use this information.
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@ -494,6 +494,26 @@ TEST(ValueTracking, ComputeNumSignBits_PR32045) {
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EXPECT_EQ(ComputeNumSignBits(RVal, M->getDataLayout()), 1u);
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}
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// No guarantees for canonical IR in this analysis, so this just bails out.
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TEST(ValueTracking, ComputeNumSignBits_Shuffle) {
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StringRef Assembly = "define <2 x i32> @f() { "
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" %val = shufflevector <2 x i32> undef, <2 x i32> undef, <2 x i32> <i32 0, i32 0> "
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" ret <2 x i32> %val "
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"} ";
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LLVMContext Context;
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SMDiagnostic Error;
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auto M = parseAssemblyString(Assembly, Error, Context);
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assert(M && "Bad assembly?");
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auto *F = M->getFunction("f");
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assert(F && "Bad assembly?");
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auto *RVal =
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cast<ReturnInst>(F->getEntryBlock().getTerminator())->getOperand(0);
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EXPECT_EQ(ComputeNumSignBits(RVal, M->getDataLayout()), 1u);
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}
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TEST(ValueTracking, ComputeKnownBits) {
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StringRef Assembly = "define i32 @f(i32 %a, i32 %b) { "
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" %ash = mul i32 %a, 8 "
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