From 6713d988a45d06f6f774af3ff2116bf9745040cd Mon Sep 17 00:00:00 2001 From: Brian Gaeke Date: Thu, 17 Jun 2004 22:34:48 +0000 Subject: [PATCH] Make storeRegToStackSlot slightly shorter. Make copyRegToReg return 1 instead of -1. Edit a comment in emitPrologue(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14211 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Sparc/SparcRegisterInfo.cpp | 14 +++++++------- lib/Target/SparcV8/SparcV8RegisterInfo.cpp | 14 +++++++------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/lib/Target/Sparc/SparcRegisterInfo.cpp b/lib/Target/Sparc/SparcRegisterInfo.cpp index 83896f89a20..67a67428e96 100644 --- a/lib/Target/Sparc/SparcRegisterInfo.cpp +++ b/lib/Target/Sparc/SparcRegisterInfo.cpp @@ -26,15 +26,14 @@ SparcV8RegisterInfo::SparcV8RegisterInfo() int SparcV8RegisterInfo::storeRegToStackSlot( MachineBasicBlock &MBB, - MachineBasicBlock::iterator MBBI, + MachineBasicBlock::iterator I, unsigned SrcReg, int FrameIdx, const TargetRegisterClass *RC) const { assert (RC == SparcV8::IntRegsRegisterClass && "Can only store 32-bit values to stack slots"); - MachineInstr *I = - BuildMI (V8::STrm, 3).addFrameIndex (FrameIdx).addSImm (0).addReg (SrcReg); - MBB.insert(MBBI, I); + // On the order of operands here: think "[FrameIdx + 0] = SrcReg". + BuildMI (MBB, I, V8::STrm, 3).addFrameIndex (FrameIdx).addSImm (0).addReg (SrcReg); return 1; } @@ -57,7 +56,7 @@ int SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB, assert (RC == SparcV8::IntRegsRegisterClass && "Can only copy 32-bit registers"); BuildMI (MBB, I, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg); - return -1; + return 1; } void SparcV8RegisterInfo:: @@ -109,8 +108,9 @@ void SparcV8RegisterInfo::emitPrologue(MachineFunction &MF) const { // ---------- // 23 words * 4 bytes per word = 92 bytes NumBytes += 92; - NumBytes = (NumBytes + 7) & ~7; // Round up to next doubleword boundary - // (Technically, a word boundary should be sufficient, but SPARC as complains) + // Round up to next doubleword boundary -- a double-word boundary + // is required by the ABI. + NumBytes = (NumBytes + 7) & ~7; BuildMI(MBB, MBB.begin(), V8::SAVEri, 2, V8::SP).addImm(-NumBytes).addReg(V8::SP); } diff --git a/lib/Target/SparcV8/SparcV8RegisterInfo.cpp b/lib/Target/SparcV8/SparcV8RegisterInfo.cpp index 83896f89a20..67a67428e96 100644 --- a/lib/Target/SparcV8/SparcV8RegisterInfo.cpp +++ b/lib/Target/SparcV8/SparcV8RegisterInfo.cpp @@ -26,15 +26,14 @@ SparcV8RegisterInfo::SparcV8RegisterInfo() int SparcV8RegisterInfo::storeRegToStackSlot( MachineBasicBlock &MBB, - MachineBasicBlock::iterator MBBI, + MachineBasicBlock::iterator I, unsigned SrcReg, int FrameIdx, const TargetRegisterClass *RC) const { assert (RC == SparcV8::IntRegsRegisterClass && "Can only store 32-bit values to stack slots"); - MachineInstr *I = - BuildMI (V8::STrm, 3).addFrameIndex (FrameIdx).addSImm (0).addReg (SrcReg); - MBB.insert(MBBI, I); + // On the order of operands here: think "[FrameIdx + 0] = SrcReg". + BuildMI (MBB, I, V8::STrm, 3).addFrameIndex (FrameIdx).addSImm (0).addReg (SrcReg); return 1; } @@ -57,7 +56,7 @@ int SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB, assert (RC == SparcV8::IntRegsRegisterClass && "Can only copy 32-bit registers"); BuildMI (MBB, I, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg); - return -1; + return 1; } void SparcV8RegisterInfo:: @@ -109,8 +108,9 @@ void SparcV8RegisterInfo::emitPrologue(MachineFunction &MF) const { // ---------- // 23 words * 4 bytes per word = 92 bytes NumBytes += 92; - NumBytes = (NumBytes + 7) & ~7; // Round up to next doubleword boundary - // (Technically, a word boundary should be sufficient, but SPARC as complains) + // Round up to next doubleword boundary -- a double-word boundary + // is required by the ABI. + NumBytes = (NumBytes + 7) & ~7; BuildMI(MBB, MBB.begin(), V8::SAVEri, 2, V8::SP).addImm(-NumBytes).addReg(V8::SP); }