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Pack MachineOperand bitfields better.

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Previously, 4 bits were unused.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171814 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2013-01-07 23:21:44 +00:00
parent b2c79f2f63
commit 6821060509
2 changed files with 20 additions and 22 deletions
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40
include/llvm/CodeGen/MachineOperand.h
View File

@ -65,15 +65,11 @@ private:
/// union.
unsigned char OpKind; // MachineOperandType
// This union is discriminated by OpKind.
union {
/// SubReg - Subregister number, only valid for MO_Register. A value of 0
/// indicates the MO_Register has no subReg.
unsigned char SubReg;
/// TargetFlags - This is a set of target-specific operand flags.
unsigned char TargetFlags;
};
/// Subregister number for MO_Register. A value of 0 indicates the
/// MO_Register has no subReg.
///
/// For all other kinds of operands, this field holds target-specific flags.
unsigned SubReg_TargetFlags : 12;
/// TiedTo - Non-zero when this register operand is tied to another register
/// operand. The encoding of this field is described in the block comment
@ -181,24 +177,25 @@ private:
} OffsetedInfo;
} Contents;
explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {
TargetFlags = 0;
}
explicit MachineOperand(MachineOperandType K)
: OpKind(K), SubReg_TargetFlags(0), ParentMI(0) {}
public:
/// getType - Returns the MachineOperandType for this operand.
///
MachineOperandType getType() const { return (MachineOperandType)OpKind; }
unsigned char getTargetFlags() const {
return isReg() ? 0 : TargetFlags;
unsigned getTargetFlags() const {
return isReg() ? 0 : SubReg_TargetFlags;
}
void setTargetFlags(unsigned char F) {
void setTargetFlags(unsigned F) {
assert(!isReg() && "Register operands can't have target flags");
TargetFlags = F;
SubReg_TargetFlags = F;
assert(SubReg_TargetFlags == F && "Target flags out of range");
}
void addTargetFlag(unsigned char F) {
void addTargetFlag(unsigned F) {
assert(!isReg() && "Register operands can't have target flags");
TargetFlags |= F;
SubReg_TargetFlags |= F;
assert((SubReg_TargetFlags & F) && "Target flags out of range");
}
@ -266,7 +263,7 @@ public:
unsigned getSubReg() const {
assert(isReg() && "Wrong MachineOperand accessor");
return (unsigned)SubReg;
return SubReg_TargetFlags;
}
bool isUse() const {
@ -341,7 +338,8 @@ public:
void setSubReg(unsigned subReg) {
assert(isReg() && "Wrong MachineOperand accessor");
SubReg = (unsigned char)subReg;
SubReg_TargetFlags = subReg;
assert(SubReg_TargetFlags == subReg && "SubReg out of range");
}
/// substVirtReg - Substitute the current register with the virtual
@ -579,7 +577,7 @@ public:
Op.SmallContents.RegNo = Reg;
Op.Contents.Reg.Prev = 0;
Op.Contents.Reg.Next = 0;
Op.SubReg = SubReg;
Op.setSubReg(SubReg);
return Op;
}
static MachineOperand CreateMBB(MachineBasicBlock *MBB,

2
lib/CodeGen/MachineInstr.cpp
View File

@ -143,7 +143,7 @@ void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp,
// Change this to a register and set the reg#.
OpKind = MO_Register;
SmallContents.RegNo = Reg;
SubReg = 0;
SubReg_TargetFlags = 0;
IsDef = isDef;
IsImp = isImp;
IsKill = isKill;