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ARM cost model: Add vector reverse shuffle costs
A reverse shuffle is lowered to a vrev and possibly a vext instruction (quad word). radar://13171406 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174933 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -114,6 +114,9 @@ public:
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return 1;
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}
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unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
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int Index, Type *SubTp) const;
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unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
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Type *Src) const;
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@ -335,3 +338,33 @@ unsigned ARMTTI::getAddressComputationCost(Type *Ty) const {
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// addressing mode.
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return 1;
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}
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unsigned ARMTTI::getShuffleCost(ShuffleKind Kind, Type *Tp, int Index,
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Type *SubTp) const {
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// We only handle costs of reverse shuffles for now.
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if (Kind != SK_Reverse)
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return TargetTransformInfo::getShuffleCost(Kind, Tp, Index, SubTp);
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static const CostTblEntry<MVT> NEONShuffleTbl[] = {
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// Reverse shuffle cost one instruction if we are shuffling within a double
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// word (vrev) or two if we shuffle a quad word (vrev, vext).
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{ ISD::VECTOR_SHUFFLE, MVT::v2i32, 1 },
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{ ISD::VECTOR_SHUFFLE, MVT::v2f32, 1 },
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{ ISD::VECTOR_SHUFFLE, MVT::v2i64, 1 },
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{ ISD::VECTOR_SHUFFLE, MVT::v2f64, 1 },
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{ ISD::VECTOR_SHUFFLE, MVT::v4i32, 2 },
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{ ISD::VECTOR_SHUFFLE, MVT::v4f32, 2 },
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{ ISD::VECTOR_SHUFFLE, MVT::v8i16, 2 },
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{ ISD::VECTOR_SHUFFLE, MVT::v16i8, 2 }
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};
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std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(Tp);
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int Idx = CostTableLookup<MVT>(NEONShuffleTbl, array_lengthof(NEONShuffleTbl),
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ISD::VECTOR_SHUFFLE, LT.second);
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if (Idx == -1)
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return TargetTransformInfo::getShuffleCost(Kind, Tp, Index, SubTp);
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return LT.first * NEONShuffleTbl[Idx].Cost;
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}
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40
test/Analysis/CostModel/ARM/shuffle.ll
Normal file
40
test/Analysis/CostModel/ARM/shuffle.ll
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@ -0,0 +1,40 @@
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; RUN: opt < %s -cost-model -analyze -mtriple=thumbv7-apple-ios6.0.0 -mcpu=swift | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
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target triple = "thumbv7-apple-ios6.0.0"
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; CHECK: shuffle
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define void @shuffle() {
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;; Reverse shuffles should be lowered to vrev and possibly a vext (for
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;; quadwords)
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; Vector values
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; CHECK: cost of 1 {{.*}} shuffle
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%v7 = shufflevector <2 x i8> undef, <2 x i8>undef, <2 x i32> <i32 1, i32 0>
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; CHECK: cost of 1 {{.*}} shuffle
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%v8 = shufflevector <4 x i8> undef, <4 x i8>undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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; CHECK: cost of 1 {{.*}} shuffle
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%v9 = shufflevector <8 x i8> undef, <8 x i8>undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
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; CHECK: cost of 2 {{.*}} shuffle
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%v10 = shufflevector <16 x i8> undef, <16 x i8>undef, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
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; CHECK: cost of 1 {{.*}} shuffle
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%v11 = shufflevector <2 x i16> undef, <2 x i16>undef, <2 x i32> <i32 1, i32 0>
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; CHECK: cost of 1 {{.*}} shuffle
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%v12 = shufflevector <4 x i16> undef, <4 x i16>undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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; CHECK: cost of 2 {{.*}} shuffle
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%v13 = shufflevector <8 x i16> undef, <8 x i16>undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
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; CHECK: cost of 1 {{.*}} shuffle
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%v14 = shufflevector <2 x i32> undef, <2 x i32>undef, <2 x i32> <i32 1, i32 0>
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; CHECK: cost of 2 {{.*}} shuffle
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%v15 = shufflevector <4 x i32> undef, <4 x i32>undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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; CHECK: cost of 1 {{.*}} shuffle
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%v16 = shufflevector <2 x float> undef, <2 x float>undef, <2 x i32> <i32 1, i32 0>
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; CHECK: cost of 2 {{.*}} shuffle
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%v17 = shufflevector <4 x float> undef, <4 x float>undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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ret void
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}
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