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Fix order of operands on a store from reg to [reg+offset].

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4857 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2002-12-02 21:10:35 +00:00
parent 9f729a30b2
commit 6877dd3fb0
1 changed files with 2 additions and 2 deletions
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4
lib/Target/X86/X86RegisterInfo.cpp
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@ -31,8 +31,8 @@ X86RegisterInfo::storeReg2RegOffset(MachineBasicBlock *MBB,
unsigned ImmOffset, unsigned dataSize)
const
{
MachineInstr *MI = addRegOffset(BuildMI(X86::MOVrm32, 5).addReg(SrcReg),
DestReg, ImmOffset);
MachineInstr *MI = addRegOffset(BuildMI(X86::MOVrm32, 5),
DestReg, ImmOffset).addReg(SrcReg);
return ++(MBB->insert(MBBI, MI));
}