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Fix PR4419: handle defs of partial uses.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73816 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-06-20 04:34:51 +00:00
parent e9fe6c7729
commit 694f6c81e8
2 changed files with 36 additions and 7 deletions
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13
lib/CodeGen/LiveVariables.cpp
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@ -359,12 +359,11 @@ bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) {
// That is, unless we are currently processing the last reference itself.
LastRefOrPartRef->addRegisterDead(Reg, TRI, true);
/* Partial uses. Mark register def dead and add implicit def of
sub-registers which are used.
FIXME: LiveIntervalAnalysis can't handle this yet!
EAX<dead> = op AL<imp-def>
That is, EAX def is dead but AL def extends pass it.
Enable this after live interval analysis is fixed to improve codegen!
// Partial uses. Mark register def dead and add implicit def of
// sub-registers which are used.
// EAX<dead> = op AL<imp-def>
// That is, EAX def is dead but AL def extends pass it.
// Enable this after live interval analysis is fixed to improve codegen!
else if (!PhysRegUse[Reg]) {
PhysRegDef[Reg]->addRegisterDead(Reg, TRI, true);
for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
@ -377,7 +376,7 @@ bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) {
PartUses.erase(*SS);
}
}
} */
}
else
LastRefOrPartRef->addRegisterKilled(Reg, TRI, true);
return true;

30
test/CodeGen/ARM/2009-06-19-RegScavengerAssert.ll Normal file
View File

@ -0,0 +1,30 @@
; RUN: llvm-as < %s | llc -mtriple=armv6-eabi -mattr=+vfp2 -float-abi=hard
; PR4419
define float @__ieee754_acosf(float %x) nounwind {
entry:
br i1 undef, label %bb, label %bb4
bb: ; preds = %entry
ret float undef
bb4: ; preds = %entry
br i1 undef, label %bb5, label %bb6
bb5: ; preds = %bb4
ret float undef
bb6: ; preds = %bb4
br i1 undef, label %bb11, label %bb12
bb11: ; preds = %bb6
%0 = tail call float @__ieee754_sqrtf(float undef) nounwind ; <float> [#uses=1]
%1 = fmul float %0, -2.000000e+00 ; <float> [#uses=1]
%2 = fadd float %1, 0x400921FB40000000 ; <float> [#uses=1]
ret float %2
bb12: ; preds = %bb6
ret float undef
}
declare float @__ieee754_sqrtf(float)