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Untabify tabs in stuff I've recently added.
Check in my register allocator state-saving code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8698 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke
parent
59b1c566c9
commit
6a256cc37c
@ -20,6 +20,10 @@
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#include "llvm/Function.h"
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#include "llvm/Type.h"
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#include "llvm/iOther.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Constants.h"
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#include "llvm/Support/InstIterator.h"
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#include "llvm/Module.h"
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#include "Support/STLExtras.h"
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#include "Support/SetOperations.h"
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#include "Support/CommandLine.h"
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@ -1137,9 +1141,9 @@ void PhyRegAlloc::markUnusableSugColors()
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if (HMI->first) {
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LiveRange *L = HMI->second; // get the LiveRange
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if (L && L->hasSuggestedColor ())
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L->setSuggestedColorUsable
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(!(MRI.isRegVolatile (L->getRegClassID (), L->getSuggestedColor ())
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&& L->isCallInterference ()));
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L->setSuggestedColorUsable
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(!(MRI.isRegVolatile (L->getRegClassID (), L->getSuggestedColor ())
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&& L->isCallInterference ()));
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}
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} // for all LR's in hash map
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}
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@ -1173,6 +1177,145 @@ void PhyRegAlloc::allocateStackSpace4SpilledLRs() {
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}
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namespace {
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/// AllocInfo - Structure representing one instruction's
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/// operand's-worth of register allocation state. We create tables
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/// made out of these data structures to generate mapping information
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/// for this register allocator. (FIXME: This might move to a header
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/// file at some point.)
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///
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struct AllocInfo {
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unsigned Instruction;
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unsigned Operand;
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unsigned AllocState;
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int Placement;
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AllocInfo (unsigned Instruction_, unsigned Operand_,
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unsigned AllocState_, int Placement_) :
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Instruction (Instruction_), Operand (Operand_),
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AllocState (AllocState_), Placement (Placement_) { }
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/// getConstantType - Return a StructType representing an AllocInfo
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/// object.
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///
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static StructType *getConstantType () {
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std::vector<const Type *> TV;
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TV.push_back (Type::UIntTy);
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TV.push_back (Type::UIntTy);
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TV.push_back (Type::UIntTy);
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TV.push_back (Type::IntTy);
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return StructType::get (TV);
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}
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/// toConstant - Convert this AllocInfo into an LLVM Constant of type
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/// getConstantType(), and return the Constant.
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///
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Constant *toConstant () const {
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StructType *ST = getConstantType ();
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std::vector<Constant *> CV;
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CV.push_back (ConstantUInt::get (Type::UIntTy, Instruction));
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CV.push_back (ConstantUInt::get (Type::UIntTy, Operand));
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CV.push_back (ConstantUInt::get (Type::UIntTy, AllocState));
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CV.push_back (ConstantSInt::get (Type::IntTy, Placement));
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return ConstantStruct::get (ST, CV);
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}
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};
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}
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void PhyRegAlloc::saveState ()
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{
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std::vector<Constant *> state;
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unsigned Insn = 0;
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LiveRangeMapType::const_iterator HMIEnd = LRI->getLiveRangeMap ()->end ();
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for (const_inst_iterator II=inst_begin (Fn), IE=inst_end (Fn); II != IE; ++II)
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for (unsigned i = 0; i < (*II)->getNumOperands (); ++i) {
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const Value *V = (*II)->getOperand (i);
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// Don't worry about it unless it's something whose reg. we'll need.
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if (!isa<Argument> (V) && !isa<Instruction> (V))
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continue;
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LiveRangeMapType::const_iterator HMI = LRI->getLiveRangeMap ()->find (V);
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static const unsigned NotAllocated = 0, Allocated = 1, Spilled = 2;
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unsigned AllocState = NotAllocated;
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int Placement = -1;
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if ((HMI != HMIEnd) && HMI->second) {
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LiveRange *L = HMI->second;
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assert ((L->hasColor () || L->isMarkedForSpill ())
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&& "Live range exists but not colored or spilled");
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if (L->hasColor()) {
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AllocState = Allocated;
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Placement = MRI.getUnifiedRegNum (L->getRegClassID (),
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L->getColor ());
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} else if (L->isMarkedForSpill ()) {
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AllocState = Spilled;
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assert (L->hasSpillOffset ()
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&& "Live range marked for spill but has no spill offset");
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Placement = L->getSpillOffFromFP ();
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}
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}
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state.push_back (AllocInfo (Insn, i, AllocState,
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Placement).toConstant ());
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}
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// Convert state into an LLVM ConstantArray, and put it in a
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// ConstantStruct (named S) along with its size.
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unsigned Size = state.size ();
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ArrayType *AT = ArrayType::get (AllocInfo::getConstantType (), Size);
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std::vector<const Type *> TV;
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TV.push_back (Type::UIntTy);
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TV.push_back (AT);
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StructType *ST = StructType::get (TV);
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std::vector<Constant *> CV;
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CV.push_back (ConstantUInt::get (Type::UIntTy, Size));
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CV.push_back (ConstantArray::get (AT, state));
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Constant *S = ConstantStruct::get (ST, CV);
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// Save S in the map containing register allocator state for this module.
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FnAllocState[Fn] = S;
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}
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bool PhyRegAlloc::doFinalization (Module &M) {
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if (!SaveRegAllocState)
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return false; // Nothing to do here, unless we're saving state.
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// Convert FnAllocState to a single Constant array and add it
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// to the Module.
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ArrayType *AT = ArrayType::get (AllocInfo::getConstantType (), 0);
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std::vector<const Type *> TV;
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TV.push_back (Type::UIntTy);
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TV.push_back (AT);
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PointerType *PT = PointerType::get (StructType::get (TV));
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std::vector<Constant *> allstate;
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for (Module::iterator I = M.begin (), E = M.end (); I != E; ++I) {
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Function *F = I;
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if (FnAllocState.find (F) == FnAllocState.end ()) {
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allstate.push_back (ConstantPointerNull::get (PT));
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} else {
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GlobalVariable *GV =
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new GlobalVariable (FnAllocState[F]->getType (), true,
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GlobalValue::InternalLinkage, FnAllocState[F],
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F->getName () + ".regAllocState", &M);
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// Have: { uint, [Size x { uint, uint, uint, int }] } *
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// Cast it to: { uint, [0 x { uint, uint, uint, int }] } *
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Constant *CE = ConstantExpr::getCast (ConstantPointerRef::get (GV), PT);
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allstate.push_back (CE);
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}
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}
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unsigned Size = allstate.size ();
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// Final structure type is:
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// { uint, [Size x { uint, [0 x { uint, uint, uint, int }] } *] }
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std::vector<const Type *> TV2;
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TV2.push_back (Type::UIntTy);
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ArrayType *AT2 = ArrayType::get (PT, Size);
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TV2.push_back (AT2);
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StructType *ST2 = StructType::get (TV2);
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std::vector<Constant *> CV2;
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CV2.push_back (ConstantUInt::get (Type::UIntTy, Size));
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CV2.push_back (ConstantArray::get (AT2, allstate));
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new GlobalVariable (ST2, true, GlobalValue::InternalLinkage,
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ConstantStruct::get (ST2, CV2), "_llvm_regAllocState",
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&M);
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return false; // No error.
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}
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//----------------------------------------------------------------------------
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// The entry point to Register Allocation
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//----------------------------------------------------------------------------
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@ -1244,6 +1387,10 @@ bool PhyRegAlloc::runOnFunction (Function &F) {
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// insert code to copy to the correct register
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colorIncomingArgs();
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// Save register allocation state for this function in a Constant.
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if (SaveRegAllocState)
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saveState();
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// Now update the machine code with register names and add any
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// additional code inserted by the register allocator to the instruction
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// stream
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@ -29,6 +29,7 @@ class FunctionLiveVarInfo;
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class MachineInstr;
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class LoopInfo;
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class RegClass;
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class Constant;
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//----------------------------------------------------------------------------
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// Class AddedInstrns:
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@ -77,6 +78,8 @@ class PhyRegAlloc : public FunctionPass {
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AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
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const LoopInfo *LoopDepthCalc; // to calculate loop depths
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std::map<const Function *, Constant *> FnAllocState;
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PhyRegAlloc(const PhyRegAlloc&); // DO NOT IMPLEMENT
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void operator=(const PhyRegAlloc&); // DO NOT IMPLEMENT
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public:
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@ -89,6 +92,8 @@ public:
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///
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virtual bool runOnFunction (Function &F);
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virtual bool doFinalization (Module &M);
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virtual void getAnalysisUsage (AnalysisUsage &AU) const;
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const char *getPassName () const {
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@ -108,6 +113,7 @@ private:
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void addInterferencesForArgs();
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void createIGNodeListsAndIGs();
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void buildInterferenceGraphs();
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void saveState();
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void setCallInterferences(const MachineInstr *MI,
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const ValueSet *LVSetAft);
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@ -20,6 +20,10 @@
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#include "llvm/Function.h"
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#include "llvm/Type.h"
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#include "llvm/iOther.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Constants.h"
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#include "llvm/Support/InstIterator.h"
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#include "llvm/Module.h"
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#include "Support/STLExtras.h"
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#include "Support/SetOperations.h"
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#include "Support/CommandLine.h"
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@ -1137,9 +1141,9 @@ void PhyRegAlloc::markUnusableSugColors()
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if (HMI->first) {
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LiveRange *L = HMI->second; // get the LiveRange
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if (L && L->hasSuggestedColor ())
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L->setSuggestedColorUsable
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(!(MRI.isRegVolatile (L->getRegClassID (), L->getSuggestedColor ())
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&& L->isCallInterference ()));
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L->setSuggestedColorUsable
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(!(MRI.isRegVolatile (L->getRegClassID (), L->getSuggestedColor ())
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&& L->isCallInterference ()));
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}
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} // for all LR's in hash map
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}
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@ -1173,6 +1177,145 @@ void PhyRegAlloc::allocateStackSpace4SpilledLRs() {
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}
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namespace {
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/// AllocInfo - Structure representing one instruction's
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/// operand's-worth of register allocation state. We create tables
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/// made out of these data structures to generate mapping information
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/// for this register allocator. (FIXME: This might move to a header
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/// file at some point.)
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///
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struct AllocInfo {
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unsigned Instruction;
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unsigned Operand;
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unsigned AllocState;
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int Placement;
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AllocInfo (unsigned Instruction_, unsigned Operand_,
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unsigned AllocState_, int Placement_) :
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Instruction (Instruction_), Operand (Operand_),
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AllocState (AllocState_), Placement (Placement_) { }
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/// getConstantType - Return a StructType representing an AllocInfo
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/// object.
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///
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static StructType *getConstantType () {
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std::vector<const Type *> TV;
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TV.push_back (Type::UIntTy);
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TV.push_back (Type::UIntTy);
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TV.push_back (Type::UIntTy);
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TV.push_back (Type::IntTy);
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return StructType::get (TV);
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}
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/// toConstant - Convert this AllocInfo into an LLVM Constant of type
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/// getConstantType(), and return the Constant.
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///
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Constant *toConstant () const {
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StructType *ST = getConstantType ();
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std::vector<Constant *> CV;
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CV.push_back (ConstantUInt::get (Type::UIntTy, Instruction));
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CV.push_back (ConstantUInt::get (Type::UIntTy, Operand));
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CV.push_back (ConstantUInt::get (Type::UIntTy, AllocState));
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CV.push_back (ConstantSInt::get (Type::IntTy, Placement));
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return ConstantStruct::get (ST, CV);
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}
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};
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}
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void PhyRegAlloc::saveState ()
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{
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std::vector<Constant *> state;
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unsigned Insn = 0;
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LiveRangeMapType::const_iterator HMIEnd = LRI->getLiveRangeMap ()->end ();
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for (const_inst_iterator II=inst_begin (Fn), IE=inst_end (Fn); II != IE; ++II)
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for (unsigned i = 0; i < (*II)->getNumOperands (); ++i) {
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const Value *V = (*II)->getOperand (i);
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// Don't worry about it unless it's something whose reg. we'll need.
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if (!isa<Argument> (V) && !isa<Instruction> (V))
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continue;
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LiveRangeMapType::const_iterator HMI = LRI->getLiveRangeMap ()->find (V);
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static const unsigned NotAllocated = 0, Allocated = 1, Spilled = 2;
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unsigned AllocState = NotAllocated;
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int Placement = -1;
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if ((HMI != HMIEnd) && HMI->second) {
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LiveRange *L = HMI->second;
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assert ((L->hasColor () || L->isMarkedForSpill ())
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&& "Live range exists but not colored or spilled");
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if (L->hasColor()) {
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AllocState = Allocated;
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Placement = MRI.getUnifiedRegNum (L->getRegClassID (),
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L->getColor ());
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} else if (L->isMarkedForSpill ()) {
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AllocState = Spilled;
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assert (L->hasSpillOffset ()
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&& "Live range marked for spill but has no spill offset");
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Placement = L->getSpillOffFromFP ();
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}
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}
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state.push_back (AllocInfo (Insn, i, AllocState,
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Placement).toConstant ());
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}
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// Convert state into an LLVM ConstantArray, and put it in a
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// ConstantStruct (named S) along with its size.
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unsigned Size = state.size ();
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ArrayType *AT = ArrayType::get (AllocInfo::getConstantType (), Size);
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std::vector<const Type *> TV;
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TV.push_back (Type::UIntTy);
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TV.push_back (AT);
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StructType *ST = StructType::get (TV);
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std::vector<Constant *> CV;
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CV.push_back (ConstantUInt::get (Type::UIntTy, Size));
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CV.push_back (ConstantArray::get (AT, state));
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Constant *S = ConstantStruct::get (ST, CV);
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// Save S in the map containing register allocator state for this module.
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FnAllocState[Fn] = S;
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}
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bool PhyRegAlloc::doFinalization (Module &M) {
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if (!SaveRegAllocState)
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return false; // Nothing to do here, unless we're saving state.
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// Convert FnAllocState to a single Constant array and add it
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// to the Module.
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ArrayType *AT = ArrayType::get (AllocInfo::getConstantType (), 0);
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std::vector<const Type *> TV;
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TV.push_back (Type::UIntTy);
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TV.push_back (AT);
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PointerType *PT = PointerType::get (StructType::get (TV));
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std::vector<Constant *> allstate;
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for (Module::iterator I = M.begin (), E = M.end (); I != E; ++I) {
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Function *F = I;
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if (FnAllocState.find (F) == FnAllocState.end ()) {
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allstate.push_back (ConstantPointerNull::get (PT));
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} else {
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GlobalVariable *GV =
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new GlobalVariable (FnAllocState[F]->getType (), true,
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GlobalValue::InternalLinkage, FnAllocState[F],
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F->getName () + ".regAllocState", &M);
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// Have: { uint, [Size x { uint, uint, uint, int }] } *
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// Cast it to: { uint, [0 x { uint, uint, uint, int }] } *
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Constant *CE = ConstantExpr::getCast (ConstantPointerRef::get (GV), PT);
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allstate.push_back (CE);
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}
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}
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unsigned Size = allstate.size ();
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// Final structure type is:
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// { uint, [Size x { uint, [0 x { uint, uint, uint, int }] } *] }
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std::vector<const Type *> TV2;
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TV2.push_back (Type::UIntTy);
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ArrayType *AT2 = ArrayType::get (PT, Size);
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TV2.push_back (AT2);
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StructType *ST2 = StructType::get (TV2);
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std::vector<Constant *> CV2;
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CV2.push_back (ConstantUInt::get (Type::UIntTy, Size));
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CV2.push_back (ConstantArray::get (AT2, allstate));
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new GlobalVariable (ST2, true, GlobalValue::InternalLinkage,
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ConstantStruct::get (ST2, CV2), "_llvm_regAllocState",
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&M);
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return false; // No error.
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}
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//----------------------------------------------------------------------------
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// The entry point to Register Allocation
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//----------------------------------------------------------------------------
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@ -1244,6 +1387,10 @@ bool PhyRegAlloc::runOnFunction (Function &F) {
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// insert code to copy to the correct register
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colorIncomingArgs();
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// Save register allocation state for this function in a Constant.
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if (SaveRegAllocState)
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saveState();
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// Now update the machine code with register names and add any
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// additional code inserted by the register allocator to the instruction
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// stream
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@ -29,6 +29,7 @@ class FunctionLiveVarInfo;
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class MachineInstr;
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class LoopInfo;
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class RegClass;
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class Constant;
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//----------------------------------------------------------------------------
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// Class AddedInstrns:
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@ -77,6 +78,8 @@ class PhyRegAlloc : public FunctionPass {
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AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
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const LoopInfo *LoopDepthCalc; // to calculate loop depths
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std::map<const Function *, Constant *> FnAllocState;
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PhyRegAlloc(const PhyRegAlloc&); // DO NOT IMPLEMENT
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void operator=(const PhyRegAlloc&); // DO NOT IMPLEMENT
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public:
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@ -89,6 +92,8 @@ public:
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///
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virtual bool runOnFunction (Function &F);
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virtual bool doFinalization (Module &M);
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virtual void getAnalysisUsage (AnalysisUsage &AU) const;
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const char *getPassName () const {
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@ -108,6 +113,7 @@ private:
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void addInterferencesForArgs();
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void createIGNodeListsAndIGs();
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void buildInterferenceGraphs();
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void saveState();
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void setCallInterferences(const MachineInstr *MI,
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const ValueSet *LVSetAft);
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