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[AVR] Convert C style comments to C++

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269895 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dylan McKay 2016-05-18 09:43:01 +00:00
parent 79149b9fae
commit 6a867d0312
7 changed files with 11 additions and 27 deletions
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4
lib/Target/AVR/AVR.h
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@ -30,9 +30,7 @@ FunctionPass *createAVRFrameAnalyzerPass();
FunctionPass *createAVRDynAllocaSRPass(); FunctionPass *createAVRDynAllocaSRPass();
FunctionPass *createAVRBranchSelectionPass(); FunctionPass *createAVRBranchSelectionPass();
/** /// Contains the AVR backend.
* Contains the AVR backend.
*/
namespace AVR { namespace AVR {
enum AddressSpace { DataMemory, ProgramMemory }; enum AddressSpace { DataMemory, ProgramMemory };

4
lib/Target/AVR/AVRInstrInfo.h
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@ -61,9 +61,7 @@ enum TOF {
} // end of namespace AVRII } // end of namespace AVRII
/** /// Utilities related to the AVR instruction set.
* Utilities related to the AVR instruction set.
*/
class AVRInstrInfo : public AVRGenInstrInfo { class AVRInstrInfo : public AVRGenInstrInfo {
public: public:
explicit AVRInstrInfo(); explicit AVRInstrInfo();

4
lib/Target/AVR/AVRMachineFunctionInfo.h
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@ -20,9 +20,7 @@
namespace llvm { namespace llvm {
/** /// Contains AVR-specific information for each MachineFunction.
* Contains AVR-specific information for each MachineFunction.
*/
class AVRMachineFunctionInfo : public MachineFunctionInfo { class AVRMachineFunctionInfo : public MachineFunctionInfo {
/// Indicates if a register has been spilled by the register /// Indicates if a register has been spilled by the register
/// allocator. /// allocator.

5
lib/Target/AVR/AVRSelectionDAGInfo.h
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@ -17,9 +17,8 @@
#include "llvm/CodeGen/SelectionDAGTargetInfo.h" #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
namespace llvm { namespace llvm {
/**
* Holds information about the AVR instruction selection DAG. /// Holds information about the AVR instruction selection DAG.
*/
class AVRSelectionDAGInfo : public SelectionDAGTargetInfo { class AVRSelectionDAGInfo : public SelectionDAGTargetInfo {
public: public:
}; };

4
lib/Target/AVR/AVRTargetMachine.h
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@ -27,9 +27,7 @@
namespace llvm { namespace llvm {
/** /// A generic AVR implementation.
* A generic AVR implementation.
*/
class AVRTargetMachine : public LLVMTargetMachine { class AVRTargetMachine : public LLVMTargetMachine {
public: public:
AVRTargetMachine(const Target &T, const Triple &TT, StringRef CPU, AVRTargetMachine(const Target &T, const Triple &TT, StringRef CPU,

5
lib/Target/AVR/AVRTargetObjectFile.h
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@ -13,9 +13,8 @@
#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
namespace llvm { namespace llvm {
/**
* Lowering for an AVR ELF32 object file. /// Lowering for an AVR ELF32 object file.
*/
class AVRTargetObjectFile : public TargetLoweringObjectFileELF { class AVRTargetObjectFile : public TargetLoweringObjectFileELF {
typedef TargetLoweringObjectFileELF Base; typedef TargetLoweringObjectFileELF Base;

12
lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
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@ -33,22 +33,16 @@ class raw_pwrite_stream;
extern Target TheAVRTarget; extern Target TheAVRTarget;
/** /// Creates a machine code emitter for AVR.
* Creates a machine code emitter for AVR.
*/
MCCodeEmitter *createAVRMCCodeEmitter(const MCInstrInfo &MCII, MCCodeEmitter *createAVRMCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI, const MCRegisterInfo &MRI,
MCContext &Ctx); MCContext &Ctx);
/** /// Creates an assembly backend for AVR.
* Creates an assembly backend for AVR.
*/
MCAsmBackend *createAVRAsmBackend(const Target &T, const MCRegisterInfo &MRI, MCAsmBackend *createAVRAsmBackend(const Target &T, const MCRegisterInfo &MRI,
const Triple &TT, StringRef CPU); const Triple &TT, StringRef CPU);
/** /// Creates an ELF object writer for AVR.
* Creates an ELF object writer for AVR.
*/
MCObjectWriter *createAVRELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI); MCObjectWriter *createAVRELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI);
} // end namespace llvm } // end namespace llvm