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RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37193 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -349,33 +349,34 @@ bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
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}
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void ARMInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
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unsigned ARMInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
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MachineFunction &MF = *MBB.getParent();
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ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
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int BOpc = AFI->isThumbFunction() ? ARM::tB : ARM::B;
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int BccOpc = AFI->isThumbFunction() ? ARM::tBcc : ARM::Bcc;
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MachineBasicBlock::iterator I = MBB.end();
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if (I == MBB.begin()) return;
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if (I == MBB.begin()) return 0;
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--I;
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if (I->getOpcode() != BOpc && I->getOpcode() != BccOpc)
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return;
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return 0;
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// Remove the branch.
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I->eraseFromParent();
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I = MBB.end();
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if (I == MBB.begin()) return;
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if (I == MBB.begin()) return 1;
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--I;
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if (I->getOpcode() != BccOpc)
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return;
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return 1;
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// Remove the branch.
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I->eraseFromParent();
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return 2;
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}
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void ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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unsigned ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond) const {
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MachineFunction &MF = *MBB.getParent();
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@ -393,12 +394,13 @@ void ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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BuildMI(&MBB, get(BOpc)).addMBB(TBB);
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else
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BuildMI(&MBB, get(BccOpc)).addMBB(TBB).addImm(Cond[0].getImm());
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return;
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return 1;
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}
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// Two-way conditional branch.
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BuildMI(&MBB, get(BccOpc)).addMBB(TBB).addImm(Cond[0].getImm());
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BuildMI(&MBB, get(BOpc)).addMBB(FBB);
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return 2;
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}
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bool ARMInstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const {
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@ -96,10 +96,10 @@ public:
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virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
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MachineBasicBlock *&FBB,
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std::vector<MachineOperand> &Cond) const;
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virtual void RemoveBranch(MachineBasicBlock &MBB) const;
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virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond) const;
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virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
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virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond) const;
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virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const;
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virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const;
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@ -97,10 +97,12 @@ unsigned SparcInstrInfo::isStoreToStackSlot(MachineInstr *MI,
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return 0;
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}
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void SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond)const{
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unsigned
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SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond)const{
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// Can only insert uncond branches so far.
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assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!");
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BuildMI(&MBB, get(SP::BA)).addMBB(TBB);
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return 1;
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}
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@ -63,9 +63,9 @@ public:
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virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
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virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond) const;
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virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond) const;
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};
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}
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@ -431,31 +431,33 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
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return true;
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}
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void X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
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unsigned X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator I = MBB.end();
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if (I == MBB.begin()) return;
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if (I == MBB.begin()) return 0;
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--I;
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if (I->getOpcode() != X86::JMP &&
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GetCondFromBranchOpc(I->getOpcode()) == X86::COND_INVALID)
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return;
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return 0;
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// Remove the branch.
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I->eraseFromParent();
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I = MBB.end();
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if (I == MBB.begin()) return;
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if (I == MBB.begin()) return 1;
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--I;
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if (GetCondFromBranchOpc(I->getOpcode()) == X86::COND_INVALID)
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return;
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return 1;
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// Remove the branch.
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I->eraseFromParent();
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return 2;
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}
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void X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond) const {
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unsigned
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X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond) const {
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// Shouldn't be a fall through.
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assert(TBB && "InsertBranch must not be told to insert a fallthrough");
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assert((Cond.size() == 1 || Cond.size() == 0) &&
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@ -470,13 +472,14 @@ void X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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unsigned Opc = GetCondBranchFromCond((X86::CondCode)Cond[0].getImm());
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BuildMI(&MBB, get(Opc)).addMBB(TBB);
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}
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return;
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return 1;
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}
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// Two-way Conditional branch.
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unsigned Opc = GetCondBranchFromCond((X86::CondCode)Cond[0].getImm());
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BuildMI(&MBB, get(Opc)).addMBB(TBB);
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BuildMI(&MBB, get(X86::JMP)).addMBB(FBB);
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return 2;
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}
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bool X86InstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const {
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@ -263,10 +263,10 @@ public:
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virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
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MachineBasicBlock *&FBB,
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std::vector<MachineOperand> &Cond) const;
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virtual void RemoveBranch(MachineBasicBlock &MBB) const;
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virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond) const;
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virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
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virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond) const;
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virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const;
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virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const;
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