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[NVPTX] Make sure we do not generate MULWIDE ISD nodes when optimizations are disabled

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With optimizations disabled, we disable the isel patterns for mul.wide; but we
were still generating MULWIDE ISD nodes.  Now, we only try to generate MULWIDE
ISD nodes in DAGCombine if the optimization level is not zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213773 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Justin Holewinski 2014-07-23 17:40:45 +00:00
parent e8d7ebcd5a
commit 6b50a7d179
2 changed files with 19 additions and 11 deletions
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3
lib/Target/NVPTX/NVPTXISelLowering.cpp
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@ -4213,8 +4213,7 @@ static SDValue PerformSHLCombine(SDNode *N,
SDValue NVPTXTargetLowering::PerformDAGCombine(SDNode *N,
DAGCombinerInfo &DCI) const {
// FIXME: Get this from the DAG somehow
CodeGenOpt::Level OptLevel = CodeGenOpt::Aggressive;
CodeGenOpt::Level OptLevel = getTargetMachine().getOptLevel();
switch (N->getOpcode()) {
default: break;
case ISD::ADD:

27
test/CodeGen/NVPTX/mulwide.ll
View File

@ -1,35 +1,44 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -O3 | FileCheck %s --check-prefix=OPT
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -O0 | FileCheck %s --check-prefix=NOOPT
; CHECK: mulwide16
; OPT-LABEL: @mulwide16
; NOOPT-LABEL: @mulwide16
define i32 @mulwide16(i16 %a, i16 %b) {
; CHECK: mul.wide.s16
; OPT: mul.wide.s16
; NOOPT: mul.lo.s32
%val0 = sext i16 %a to i32
%val1 = sext i16 %b to i32
%val2 = mul i32 %val0, %val1
ret i32 %val2
}
; CHECK: mulwideu16
; OPT-LABEL: @mulwideu16
; NOOPT-LABEL: @mulwideu16
define i32 @mulwideu16(i16 %a, i16 %b) {
; CHECK: mul.wide.u16
; OPT: mul.wide.u16
; NOOPT: mul.lo.s32
%val0 = zext i16 %a to i32
%val1 = zext i16 %b to i32
%val2 = mul i32 %val0, %val1
ret i32 %val2
}
; CHECK: mulwide32
; OPT-LABEL: @mulwide32
; NOOPT-LABEL: @mulwide32
define i64 @mulwide32(i32 %a, i32 %b) {
; CHECK: mul.wide.s32
; OPT: mul.wide.s32
; NOOPT: mul.lo.s64
%val0 = sext i32 %a to i64
%val1 = sext i32 %b to i64
%val2 = mul i64 %val0, %val1
ret i64 %val2
}
; CHECK: mulwideu32
; OPT-LABEL: @mulwideu32
; NOOPT-LABEL: @mulwideu32
define i64 @mulwideu32(i32 %a, i32 %b) {
; CHECK: mul.wide.u32
; OPT: mul.wide.u32
; NOOPT: mul.lo.s64
%val0 = zext i32 %a to i64
%val1 = zext i32 %b to i64
%val2 = mul i64 %val0, %val1