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https://github.com/RPCS3/llvm.git
synced 2025-04-02 05:12:20 +00:00
Reformatting. Inserted code comments. Cleaned interfaces.
Removed unncessary code. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67371 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sanjiv Gupta
parent
b169426272
commit
6b830e6d0d
@ -142,6 +142,41 @@ PIC16TargetLowering::PIC16TargetLowering(PIC16TargetMachine &TM)
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computeRegisterProperties();
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}
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// getOutFlag - Extract the flag result if the Op has it.
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static SDValue getOutFlag(SDValue &Op) {
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// Flag is the last value of the node.
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SDValue Flag = Op.getValue(Op.getNode()->getNumValues() - 1);
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assert (Flag.getValueType() == MVT::Flag
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&& "Node does not have an out Flag");
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return Flag;
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}
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// To extract chain value from the SDValue Nodes
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// This function will help to maintain the chain extracting
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// code at one place. In case of any change in future it will
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// help maintain the code.
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static SDValue getChain(SDValue &Op) {
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SDValue Chain = Op.getValue(Op.getNode()->getNumValues() - 1);
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// If the last value returned in Flag then the chain is
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// second last value returned.
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if (Chain.getValueType() == MVT::Flag)
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Chain = Op.getValue(Op.getNode()->getNumValues() - 2);
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// All nodes may not produce a chain. Therefore following assert
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// verifies that the node is returning a chain only.
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assert (Chain.getValueType() == MVT::Other
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&& "Node does not have a chain");
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return Chain;
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}
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/// PopulateResults - Helper function to LowerOperation.
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/// If a node wants to return multiple results after lowering,
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/// it stuffs them into an array of SDValue called Results.
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static void PopulateResults(SDValue N, SmallVectorImpl<SDValue>&Results) {
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if (N.getOpcode() == ISD::MERGE_VALUES) {
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int NumResults = N.getNumOperands();
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@ -156,6 +191,8 @@ MVT PIC16TargetLowering::getSetCCResultType(MVT ValType) const {
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return MVT::i8;
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}
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/// FIXME: These three functions below should not be here if we change
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/// the generic code to allow generting libcalls for I8 types as well.
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void
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PIC16TargetLowering::setPIC16LibcallName(PIC16ISD::PIC16Libcall Call,
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@ -195,47 +232,6 @@ PIC16TargetLowering::MakePIC16Libcall(PIC16ISD::PIC16Libcall Call,
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return CallInfo.first;
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}
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SDValue
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PIC16TargetLowering::getCurrentFrame(SelectionDAG &DAG) {
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MachineFunction &MF = DAG.getMachineFunction();
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const Function *Func = MF.getFunction();
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const std::string FuncName = Func->getName();
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// this is causing memory waste
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// because for every call new memory will be allocated
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char *tmpName = new char [strlen(FuncName.c_str()) + 6];
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sprintf(tmpName, "%s.tmp", FuncName.c_str());
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// if the external symbol of the same name already exists then
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// it will not create the new one.
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return DAG.getTargetExternalSymbol(tmpName, MVT::i8);
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}
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void
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PIC16TargetLowering::getCurrentFrameIndex(SelectionDAG &DAG, SDValue &ES,
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unsigned SlotSize, int &FromFI) {
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MachineFunction &MF = DAG.getMachineFunction();
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const Function *Func = MF.getFunction();
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const std::string FuncName = Func->getName();
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// this is causing memory waste
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// because for every call new memory will be allocated
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char *tmpName = new char [strlen(FuncName.c_str()) + 6];
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sprintf(tmpName, "%s.tmp", FuncName.c_str());
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// if the external symbol of the same name already exists then
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// it will not create the new one.
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ES = DAG.getTargetExternalSymbol(tmpName, MVT::i8);
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// Alignment is always 1
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//FromFI = MF.getFrameInfo()->CreateStackObject(SlotSize, 1);
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FromFI = MF.getFrameInfo()->CreateStackObject(1, 1);
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int FI;
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for(unsigned i=1;i<SlotSize; ++i) {
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FI = MF.getFrameInfo()->CreateStackObject(1, 1);
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}
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}
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const char *PIC16TargetLowering::getTargetNodeName(unsigned Opcode) const {
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switch (Opcode) {
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default: return NULL;
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@ -477,51 +473,24 @@ bool PIC16TargetLowering::isRomAddress(const SDValue &Op) {
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return false;
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}
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// Extract the out flag
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SDValue PIC16TargetLowering::getOutFlag(SDValue &Op) {
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SDValue Flag = Op.getValue(Op.getNode()->getNumValues() - 1);
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assert (Flag.getValueType() == MVT::Flag && "Node does not have an out Flag");
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return Flag;
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}
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// To extract chain value from the SDValue Nodes
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// This function will help to maintain the chain extracting
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// code at one place. In case of any change in future it will
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// help maintain the code.
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SDValue PIC16TargetLowering::getChain(SDValue &Op) {
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SDValue Chain = Op.getValue(Op.getNode()->getNumValues() - 1);
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// If the last value returned in Flag then the chain is
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// second last value returned.
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if (Chain.getValueType() == MVT::Flag)
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Chain = Op.getValue(Op.getNode()->getNumValues() - 2);
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// All nodes may not produce a chain. Therefore following assert
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// verifies that the node is returning a chain only.
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assert (Chain.getValueType() == MVT::Other && "Node does not have a chain");
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return Chain;
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}
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// GetExpandedParts - This function is on the similiar lines as
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// the GetExpandedInteger in type legalizer is. This returns expanded
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// parts of Op in Lo and Hi.
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void PIC16TargetLowering::GetExpandedParts(SDValue Op, SelectionDAG &DAG,
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SDValue &Lo, SDValue &Hi) {
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SDNode *N = Op.getNode();
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DebugLoc dl = N->getDebugLoc();
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MVT NewVT;
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std::vector<SDValue> Opers;
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NewVT = getTypeToTransformTo(N->getValueType(0));
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MVT NewVT = getTypeToTransformTo(N->getValueType(0));
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// extract the lo component
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Opers.push_back(Op);
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Opers.push_back(DAG.getConstant(0,MVT::i8));
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Lo = DAG.getNode(ISD::EXTRACT_ELEMENT,dl,NewVT,&Opers[0],Opers.size());
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// Extract the lo component.
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Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NewVT, Op,
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DAG.getConstant(0, MVT::i8));
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// extract the hi component
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Opers.clear();
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Opers.push_back(Op);
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Opers.push_back(DAG.getConstant(1,MVT::i8));
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Hi = DAG.getNode(ISD::EXTRACT_ELEMENT,dl,NewVT,&Opers[0],Opers.size());
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Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, NewVT, Op,
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DAG.getConstant(1, MVT::i8));
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}
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// Legalize FrameIndex into ExternalSymbol and offset.
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@ -621,19 +590,6 @@ void PIC16TargetLowering:: LegalizeAddress(SDValue Ptr, SelectionDAG &DAG,
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return;
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}
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//SDValue PIC16TargetLowering::ExpandAdd(SDNode *N, SelectionDAG &DAG) {
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//SDValue OperLeft = N->getOperand(0);
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//SDValue OperRight = N->getOperand(1);
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//if((OperLeft.getOpcode() == ISD::Constant) ||
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//(OperRight.getOpcode() == ISD::Constant)) {
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//return SDValue();
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//}
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// These case are yet to be handled
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//return SDValue();
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//}
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SDValue PIC16TargetLowering::ExpandLoad(SDNode *N, SelectionDAG &DAG) {
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LoadSDNode *LD = dyn_cast<LoadSDNode>(SDValue(N, 0));
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SDValue Chain = LD->getChain();
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@ -1099,12 +1055,19 @@ bool PIC16TargetLowering::isDirectLoad(const SDValue Op) {
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return false;
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}
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// NeedToConvertToMemOp - Returns true if one of the operands of the
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// operation 'Op' needs to be put into memory. Also returns the
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// operand no. of the operand to be converted in 'MemOp'. Remember, PIC16 has
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// no instruction that can operation on two registers. Most insns take
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// one register and one memory operand (addwf) / Constant (addlw).
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bool PIC16TargetLowering::NeedToConvertToMemOp(SDValue Op, unsigned &MemOp) {
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// Return false if one of the operands is already a direct
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// load and that operand has only one use.
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// If one of the operand is a constant, return false.
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if (Op.getOperand(0).getOpcode() == ISD::Constant ||
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Op.getOperand(1).getOpcode() == ISD::Constant)
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return false;
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// Return false if one of the operands is already a direct
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// load and that operand has only one use.
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if (isDirectLoad(Op.getOperand(0))) {
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if (Op.getOperand(0).hasOneUse())
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return false;
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@ -1120,10 +1083,14 @@ bool PIC16TargetLowering::NeedToConvertToMemOp(SDValue Op, unsigned &MemOp) {
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return true;
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}
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SDValue PIC16TargetLowering:: LowerBinOp(SDValue Op, SelectionDAG &DAG) {
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// LowerBinOp - Lower a commutative binary operation that does not
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// affect status flag carry.
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SDValue PIC16TargetLowering::LowerBinOp(SDValue Op, SelectionDAG &DAG) {
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DebugLoc dl = Op.getDebugLoc();
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// We should have handled larger operands in type legalizer itself.
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assert (Op.getValueType() == MVT::i8 && "illegal Op to lower");
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unsigned MemOp = 1;
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if (NeedToConvertToMemOp(Op, MemOp)) {
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// Put one value on stack.
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@ -1137,7 +1104,9 @@ SDValue PIC16TargetLowering:: LowerBinOp(SDValue Op, SelectionDAG &DAG) {
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}
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}
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SDValue PIC16TargetLowering:: LowerADD(SDValue Op, SelectionDAG &DAG) {
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// LowerADD - Lower all types of ADD operations including the ones
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// that affects carry.
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SDValue PIC16TargetLowering::LowerADD(SDValue Op, SelectionDAG &DAG) {
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// We should have handled larger operands in type legalizer itself.
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assert (Op.getValueType() == MVT::i8 && "illegal add to lower");
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DebugLoc dl = Op.getDebugLoc();
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@ -1189,7 +1158,7 @@ SDValue PIC16TargetLowering::LowerSUB(SDValue Op, SelectionDAG &DAG) {
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// equal. Therefore to construct MERGE_VALUE node, UNDEF nodes equal to the
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// number of arguments of function have been created.
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SDValue PIC16TargetLowering:: LowerFORMAL_ARGUMENTS(SDValue Op,
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SDValue PIC16TargetLowering::LowerFORMAL_ARGUMENTS(SDValue Op,
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SelectionDAG &DAG) {
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SmallVector<SDValue, 8> ArgValues;
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unsigned NumArgs = Op.getNumOperands() - 3;
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@ -1207,7 +1176,8 @@ SDValue PIC16TargetLowering:: LowerFORMAL_ARGUMENTS(SDValue Op,
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ArgValues.size()).getValue(Op.getResNo());
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}
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// Perform DAGCombine of PIC16Load
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// Perform DAGCombine of PIC16Load.
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// FIXME - Need a more elaborate comment here.
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SDValue PIC16TargetLowering::
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PerformPIC16LoadCombine(SDNode *N, DAGCombinerInfo &DCI) const {
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SelectionDAG &DAG = DCI.DAG;
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@ -120,15 +120,6 @@ namespace llvm {
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// function will return true
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bool isRomAddress(const SDValue &Op);
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// To extract chain value from the SDValue Nodes
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// This function will help to maintain the chain extracting
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// code at one place. In case of any change in future it will
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// help maintain the code
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SDValue getChain(SDValue &Op);
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SDValue getOutFlag(SDValue &Op);
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// Extract the Lo and Hi component of Op.
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void GetExpandedParts(SDValue Op, SelectionDAG &DAG, SDValue &Lo,
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SDValue &Hi);
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@ -173,11 +164,6 @@ namespace llvm {
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// Check if operation has a direct load operand.
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inline bool isDirectLoad(const SDValue Op);
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// Create the symbol and index for function frame
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void getCurrentFrameIndex(SelectionDAG &DAG, SDValue &ES,
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unsigned SlotSize, int &FI);
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SDValue getCurrentFrame(SelectionDAG &DAG);
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};
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} // namespace llvm
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