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Fix Olden/bh, CR0 was being set in the wrong order
LowerCallTo and ISD::CALL are going to need to be modified, regs are being set in the wrong order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20981 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -731,6 +731,7 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
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unsigned TrueValue = SelectExpr(N.getOperand(1)); //Use if TRUE
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unsigned FalseValue = SelectExpr(N.getOperand(2)); //Use if FALSE
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Opc = SelectSetCR0(N.getOperand(0));
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// Create an iterator with which to insert the MBB for copying the false
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// value and the MBB to hold the PHI instruction for this SetCC.
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@ -745,11 +746,9 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
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// cmpTY cr0, r1, r2
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// bCC copy1MBB
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// fallthrough --> copy0MBB
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Tmp1 = SelectExpr(N.getOperand(0)); //Cond
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BuildMI(BB, PPC::CMPLWI, 2, PPC::CR0).addReg(Tmp1).addImm(0);
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MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB);
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MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB);
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BuildMI(BB, PPC::BNE, 2).addReg(PPC::CR0).addMBB(sinkMBB);
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BuildMI(BB, Opc, 2).addReg(PPC::CR0).addMBB(sinkMBB);
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MachineFunction *F = BB->getParent();
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F->getBasicBlockList().insert(It, copy0MBB);
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F->getBasicBlockList().insert(It, sinkMBB);
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@ -1365,10 +1364,9 @@ unsigned ISel::SelectExpr(SDOperand N) {
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return 0;
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case ISD::SELECT: {
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Opc = SelectSetCR0(N.getOperand(0));
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unsigned TrueValue = SelectExpr(N.getOperand(1)); //Use if TRUE
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unsigned FalseValue = SelectExpr(N.getOperand(2)); //Use if FALSE
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Opc = SelectSetCR0(N.getOperand(0));
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// Create an iterator with which to insert the MBB for copying the false
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// value and the MBB to hold the PHI instruction for this SetCC.
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