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Forgot to add this change for http://llvm.org/viewvc/llvm-project?view=rev&revision=129387.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129451 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1497,20 +1497,20 @@ def t2STRHT : T2IstT<0b01, "strht", IIC_iStore_bh_i>;
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// ldrd / strd pre / post variants
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// For disassembly only.
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def t2LDRD_PRE : T2Ii8s4<1, 1, 1, (outs GPR:$Rt, GPR:$Rt2),
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def t2LDRD_PRE : T2Ii8s4<1, 1, 1, (outs rGPR:$Rt, rGPR:$Rt2),
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(ins GPR:$base, t2am_imm8s4_offset:$imm), IIC_iLoad_d_ru,
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"ldrd", "\t$Rt, $Rt2, [$base, $imm]!", []>;
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def t2LDRD_POST : T2Ii8s4<0, 1, 1, (outs GPR:$Rt, GPR:$Rt2),
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def t2LDRD_POST : T2Ii8s4<0, 1, 1, (outs rGPR:$Rt, rGPR:$Rt2),
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(ins GPR:$base, t2am_imm8s4_offset:$imm), IIC_iLoad_d_ru,
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"ldrd", "\t$Rt, $Rt2, [$base], $imm", []>;
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def t2STRD_PRE : T2Ii8s4<1, 1, 0, (outs),
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(ins GPR:$Rt, GPR:$Rt2, GPR:$base, t2am_imm8s4_offset:$imm),
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(ins rGPR:$Rt, rGPR:$Rt2, GPR:$base, t2am_imm8s4_offset:$imm),
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IIC_iStore_d_ru, "strd", "\t$Rt, $Rt2, [$base, $imm]!", []>;
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def t2STRD_POST : T2Ii8s4<0, 1, 0, (outs),
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(ins GPR:$Rt, GPR:$Rt2, GPR:$base, t2am_imm8s4_offset:$imm),
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(ins rGPR:$Rt, rGPR:$Rt2, GPR:$base, t2am_imm8s4_offset:$imm),
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IIC_iStore_d_ru, "strd", "\t$Rt, $Rt2, [$base], $imm", []>;
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// T2Ipl (Preload Data/Instruction) signals the memory system of possible future
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