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Recognize BookE's mbar instruction.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214244 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Joerg Sonnenberger 2014-07-29 23:16:31 +00:00
parent 04bcdf16a9
commit 6e48dd6d5b
4 changed files with 18 additions and 0 deletions
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9
lib/Target/PowerPC/PPCInstrFormats.td
View File

@ -468,6 +468,15 @@ class XForm_sr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
let Inst{21-30} = xo;
}
class XForm_mbar<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin>
: I<opcode, OOL, IOL, asmstr, itin> {
bits<5> MO;
let Inst{6-10} = MO;
let Inst{21-30} = xo;
}
class XForm_srin<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin>
: I<opcode, OOL, IOL, asmstr, itin> {

3
lib/Target/PowerPC/PPCInstrInfo.td
View File

@ -3046,6 +3046,9 @@ def EIEIO : XForm_24_eieio<31, 854, (outs), (ins),
def WAIT : XForm_24_sync<31, 62, (outs), (ins i32imm:$L),
"wait $L", IIC_LdStLoad, []>;
def MBAR : XForm_mbar<31, 854, (outs), (ins u5imm:$MO),
"mbar $MO", IIC_LdStLoad>, Requires<[IsBookE]>;
def MTSR: XForm_sr<31, 210, (outs), (ins gprc:$RS, u4imm:$SR),
"mtsr $SR, $RS", IIC_SprMTSR>;

3
test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
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@ -33,6 +33,9 @@
# CHECK: wait 2
0x7c 0x40 0x00 0x7c
# CHECK: mbar 1
0x7c 0x20 0x06 0xac
# CHECK: dcbf 2, 3
0x7c 0x02 0x18 0xac

3
test/MC/PowerPC/ppc64-encoding-bookII.s
View File

@ -53,6 +53,9 @@
# CHECK-BE: wait 2 # encoding: [0x7c,0x40,0x00,0x7c]
# CHECK-LE: wait 2 # encoding: [0x7c,0x00,0x40,0x7c]
wait 2
# CHECK-BE: mbar 1 # encoding: [0x7c,0x20,0x06,0xac]
# CHECK-LE: mbar 1 # encoding: [0xac,0x06,0x20,0x7c]
mbar 1
# Extended mnemonics