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Don't call SimplifyDemandedBits on vectors

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27128 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-03-25 22:19:00 +00:00
parent 2430a5f0c7
commit 6ea2dee6f6
1 changed files with 2 additions and 1 deletions
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3
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -1120,7 +1120,8 @@ SDOperand DAGCombiner::visitAND(SDNode *N) {
}
// fold (and (sign_extend_inreg x, i16 to i32), 1) -> (and x, 1)
// fold (and (sra)) -> (and (srl)) when possible.
if (SimplifyDemandedBits(SDOperand(N, 0)))
if (!MVT::isVector(VT) &&
SimplifyDemandedBits(SDOperand(N, 0)))
return SDOperand();
// fold (zext_inreg (extload x)) -> (zextload x)
if (N0.getOpcode() == ISD::EXTLOAD) {